i965: Clean up error handling for context creation.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
39
40 #include "utils.h"
41 #include "xmlpool.h"
42
43 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_BEGIN
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
49 */
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
54 DRI_CONF_DESC_END
55 DRI_CONF_OPT_END
56
57 DRI_CONF_OPT_BEGIN_B(hiz, "true")
58 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
59 DRI_CONF_OPT_END
60
61 DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization, "false")
62 DRI_CONF_DESC(en, "Derivatives with finer granularity by default")
63 DRI_CONF_OPT_END
64
65 DRI_CONF_SECTION_END
66 DRI_CONF_SECTION_QUALITY
67 DRI_CONF_FORCE_S3TC_ENABLE("false")
68 DRI_CONF_SECTION_END
69 DRI_CONF_SECTION_DEBUG
70 DRI_CONF_NO_RAST("false")
71 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
72 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
73 DRI_CONF_DISABLE_THROTTLING("false")
74 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
75 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
76 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
77
78 DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
79 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
80 DRI_CONF_OPT_END
81 DRI_CONF_SECTION_END
82 DRI_CONF_END;
83
84 #include "intel_batchbuffer.h"
85 #include "intel_buffers.h"
86 #include "intel_bufmgr.h"
87 #include "intel_chipset.h"
88 #include "intel_fbo.h"
89 #include "intel_mipmap_tree.h"
90 #include "intel_screen.h"
91 #include "intel_tex.h"
92 #include "intel_regions.h"
93
94 #include "brw_context.h"
95
96 #include "i915_drm.h"
97
98 #ifdef USE_NEW_INTERFACE
99 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
100 #endif /*USE_NEW_INTERFACE */
101
102 /**
103 * For debugging purposes, this returns a time in seconds.
104 */
105 double
106 get_time(void)
107 {
108 struct timespec tp;
109
110 clock_gettime(CLOCK_MONOTONIC, &tp);
111
112 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
113 }
114
115 void
116 aub_dump_bmp(struct gl_context *ctx)
117 {
118 struct gl_framebuffer *fb = ctx->DrawBuffer;
119
120 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
121 struct intel_renderbuffer *irb =
122 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
123
124 if (irb && irb->mt) {
125 enum aub_dump_bmp_format format;
126
127 switch (irb->Base.Base.Format) {
128 case MESA_FORMAT_ARGB8888:
129 case MESA_FORMAT_XRGB8888:
130 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
131 break;
132 default:
133 continue;
134 }
135
136 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
137 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
138 irb->draw_x,
139 irb->draw_y,
140 irb->Base.Base.Width,
141 irb->Base.Base.Height,
142 format,
143 irb->mt->region->pitch,
144 0);
145 }
146 }
147 }
148
149 static const __DRItexBufferExtension intelTexBufferExtension = {
150 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
151
152 .setTexBuffer = intelSetTexBuffer,
153 .setTexBuffer2 = intelSetTexBuffer2,
154 .releaseTexBuffer = NULL,
155 };
156
157 static void
158 intel_dri2_flush_with_flags(__DRIcontext *cPriv,
159 __DRIdrawable *dPriv,
160 unsigned flags,
161 enum __DRI2throttleReason reason)
162 {
163 struct brw_context *brw = cPriv->driverPrivate;
164
165 if (!brw)
166 return;
167
168 struct gl_context *ctx = &brw->ctx;
169
170 FLUSH_VERTICES(ctx, 0);
171
172 if (flags & __DRI2_FLUSH_DRAWABLE)
173 intel_resolve_for_dri2_flush(brw, dPriv);
174
175 if (reason == __DRI2_THROTTLE_SWAPBUFFER ||
176 reason == __DRI2_THROTTLE_FLUSHFRONT) {
177 brw->need_throttle = true;
178 }
179
180 intel_batchbuffer_flush(brw);
181
182 if (INTEL_DEBUG & DEBUG_AUB) {
183 aub_dump_bmp(ctx);
184 }
185 }
186
187 /**
188 * Provides compatibility with loaders that only support the older (version
189 * 1-3) flush interface.
190 *
191 * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
192 */
193 static void
194 intel_dri2_flush(__DRIdrawable *drawable)
195 {
196 intel_dri2_flush_with_flags(drawable->driContextPriv, drawable,
197 __DRI2_FLUSH_DRAWABLE,
198 __DRI2_THROTTLE_SWAPBUFFER);
199 }
200
201 static const struct __DRI2flushExtensionRec intelFlushExtension = {
202 .base = { __DRI2_FLUSH, 4 },
203
204 .flush = intel_dri2_flush,
205 .invalidate = dri2InvalidateDrawable,
206 .flush_with_flags = intel_dri2_flush_with_flags,
207 };
208
209 static struct intel_image_format intel_image_formats[] = {
210 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
212
213 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
214 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
215
216 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
217 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
218 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
219 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
220
221 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
222 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
223 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
224 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
225
226 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
227 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
228 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
229 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
230
231 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
232 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
233 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
234 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
235
236 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
237 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
238 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
239 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
240
241 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
242 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
243 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
244
245 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
246 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
247 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
248
249 /* For YUYV buffers, we set up two overlapping DRI images and treat
250 * them as planar buffers in the compositors. Plane 0 is GR88 and
251 * samples YU or YV pairs and places Y into the R component, while
252 * plane 1 is ARGB and samples YUYV clusters and places pairs and
253 * places U into the G component and V into A. This lets the
254 * texture sampler interpolate the Y components correctly when
255 * sampling from plane 0, and interpolate U and V correctly when
256 * sampling from plane 1. */
257 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
258 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
259 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
260 };
261
262 static struct intel_image_format *
263 intel_image_format_lookup(int fourcc)
264 {
265 struct intel_image_format *f = NULL;
266
267 for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
268 if (intel_image_formats[i].fourcc == fourcc) {
269 f = &intel_image_formats[i];
270 break;
271 }
272 }
273
274 return f;
275 }
276
277 static __DRIimage *
278 intel_allocate_image(int dri_format, void *loaderPrivate)
279 {
280 __DRIimage *image;
281
282 image = calloc(1, sizeof *image);
283 if (image == NULL)
284 return NULL;
285
286 image->dri_format = dri_format;
287 image->offset = 0;
288
289 switch (dri_format) {
290 case __DRI_IMAGE_FORMAT_RGB565:
291 image->format = MESA_FORMAT_RGB565;
292 break;
293 case __DRI_IMAGE_FORMAT_XRGB8888:
294 image->format = MESA_FORMAT_XRGB8888;
295 break;
296 case __DRI_IMAGE_FORMAT_ARGB8888:
297 image->format = MESA_FORMAT_ARGB8888;
298 break;
299 case __DRI_IMAGE_FORMAT_ABGR8888:
300 image->format = MESA_FORMAT_RGBA8888_REV;
301 break;
302 case __DRI_IMAGE_FORMAT_XBGR8888:
303 image->format = MESA_FORMAT_RGBX8888_REV;
304 break;
305 case __DRI_IMAGE_FORMAT_R8:
306 image->format = MESA_FORMAT_R8;
307 break;
308 case __DRI_IMAGE_FORMAT_GR88:
309 image->format = MESA_FORMAT_GR88;
310 break;
311 case __DRI_IMAGE_FORMAT_NONE:
312 image->format = MESA_FORMAT_NONE;
313 break;
314 default:
315 free(image);
316 return NULL;
317 }
318
319 image->internal_format = _mesa_get_format_base_format(image->format);
320 image->data = loaderPrivate;
321
322 return image;
323 }
324
325 /**
326 * Sets up a DRIImage structure to point to our shared image in a region
327 */
328 static void
329 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
330 struct intel_mipmap_tree *mt, GLuint level,
331 GLuint zoffset)
332 {
333 unsigned int draw_x, draw_y;
334 uint32_t mask_x, mask_y;
335
336 intel_miptree_make_shareable(brw, mt);
337
338 intel_miptree_check_level_layer(mt, level, zoffset);
339
340 intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
341 intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
342
343 image->width = mt->level[level].width;
344 image->height = mt->level[level].height;
345 image->tile_x = draw_x & mask_x;
346 image->tile_y = draw_y & mask_y;
347
348 image->offset = intel_region_get_aligned_offset(mt->region,
349 draw_x & ~mask_x,
350 draw_y & ~mask_y,
351 false);
352
353 intel_region_reference(&image->region, mt->region);
354 }
355
356 static void
357 intel_setup_image_from_dimensions(__DRIimage *image)
358 {
359 image->width = image->region->width;
360 image->height = image->region->height;
361 image->tile_x = 0;
362 image->tile_y = 0;
363 image->has_depthstencil = false;
364 }
365
366 static inline uint32_t
367 intel_dri_format(GLuint format)
368 {
369 switch (format) {
370 case MESA_FORMAT_RGB565:
371 return __DRI_IMAGE_FORMAT_RGB565;
372 case MESA_FORMAT_XRGB8888:
373 return __DRI_IMAGE_FORMAT_XRGB8888;
374 case MESA_FORMAT_ARGB8888:
375 return __DRI_IMAGE_FORMAT_ARGB8888;
376 case MESA_FORMAT_RGBA8888_REV:
377 return __DRI_IMAGE_FORMAT_ABGR8888;
378 case MESA_FORMAT_R8:
379 return __DRI_IMAGE_FORMAT_R8;
380 case MESA_FORMAT_RG88:
381 return __DRI_IMAGE_FORMAT_GR88;
382 }
383
384 return MESA_FORMAT_NONE;
385 }
386
387 static __DRIimage *
388 intel_create_image_from_name(__DRIscreen *screen,
389 int width, int height, int format,
390 int name, int pitch, void *loaderPrivate)
391 {
392 struct intel_screen *intelScreen = screen->driverPrivate;
393 __DRIimage *image;
394 int cpp;
395
396 image = intel_allocate_image(format, loaderPrivate);
397 if (image == NULL)
398 return NULL;
399
400 if (image->format == MESA_FORMAT_NONE)
401 cpp = 1;
402 else
403 cpp = _mesa_get_format_bytes(image->format);
404 image->region = intel_region_alloc_for_handle(intelScreen,
405 cpp, width, height,
406 pitch * cpp, name, "image");
407 if (image->region == NULL) {
408 free(image);
409 return NULL;
410 }
411
412 intel_setup_image_from_dimensions(image);
413
414 return image;
415 }
416
417 static __DRIimage *
418 intel_create_image_from_renderbuffer(__DRIcontext *context,
419 int renderbuffer, void *loaderPrivate)
420 {
421 __DRIimage *image;
422 struct brw_context *brw = context->driverPrivate;
423 struct gl_context *ctx = &brw->ctx;
424 struct gl_renderbuffer *rb;
425 struct intel_renderbuffer *irb;
426
427 rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
428 if (!rb) {
429 _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
430 return NULL;
431 }
432
433 irb = intel_renderbuffer(rb);
434 intel_miptree_make_shareable(brw, irb->mt);
435 image = calloc(1, sizeof *image);
436 if (image == NULL)
437 return NULL;
438
439 image->internal_format = rb->InternalFormat;
440 image->format = rb->Format;
441 image->offset = 0;
442 image->data = loaderPrivate;
443 intel_region_reference(&image->region, irb->mt->region);
444 intel_setup_image_from_dimensions(image);
445 image->dri_format = intel_dri_format(image->format);
446 image->has_depthstencil = irb->mt->stencil_mt? true : false;
447
448 rb->NeedsFinishRenderTexture = true;
449 return image;
450 }
451
452 static __DRIimage *
453 intel_create_image_from_texture(__DRIcontext *context, int target,
454 unsigned texture, int zoffset,
455 int level,
456 unsigned *error,
457 void *loaderPrivate)
458 {
459 __DRIimage *image;
460 struct brw_context *brw = context->driverPrivate;
461 struct gl_texture_object *obj;
462 struct intel_texture_object *iobj;
463 GLuint face = 0;
464
465 obj = _mesa_lookup_texture(&brw->ctx, texture);
466 if (!obj || obj->Target != target) {
467 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
468 return NULL;
469 }
470
471 if (target == GL_TEXTURE_CUBE_MAP)
472 face = zoffset;
473
474 _mesa_test_texobj_completeness(&brw->ctx, obj);
475 iobj = intel_texture_object(obj);
476 if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
477 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
478 return NULL;
479 }
480
481 if (level < obj->BaseLevel || level > obj->_MaxLevel) {
482 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
483 return NULL;
484 }
485
486 if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
487 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
488 return NULL;
489 }
490 image = calloc(1, sizeof *image);
491 if (image == NULL) {
492 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
493 return NULL;
494 }
495
496 image->internal_format = obj->Image[face][level]->InternalFormat;
497 image->format = obj->Image[face][level]->TexFormat;
498 image->data = loaderPrivate;
499 intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
500 image->dri_format = intel_dri_format(image->format);
501 image->has_depthstencil = iobj->mt->stencil_mt? true : false;
502 if (image->dri_format == MESA_FORMAT_NONE) {
503 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
504 free(image);
505 return NULL;
506 }
507
508 *error = __DRI_IMAGE_ERROR_SUCCESS;
509 return image;
510 }
511
512 static void
513 intel_destroy_image(__DRIimage *image)
514 {
515 intel_region_release(&image->region);
516 free(image);
517 }
518
519 static __DRIimage *
520 intel_create_image(__DRIscreen *screen,
521 int width, int height, int format,
522 unsigned int use,
523 void *loaderPrivate)
524 {
525 __DRIimage *image;
526 struct intel_screen *intelScreen = screen->driverPrivate;
527 uint32_t tiling;
528 int cpp;
529
530 tiling = I915_TILING_X;
531 if (use & __DRI_IMAGE_USE_CURSOR) {
532 if (width != 64 || height != 64)
533 return NULL;
534 tiling = I915_TILING_NONE;
535 }
536
537 if (use & __DRI_IMAGE_USE_LINEAR)
538 tiling = I915_TILING_NONE;
539
540 image = intel_allocate_image(format, loaderPrivate);
541 if (image == NULL)
542 return NULL;
543
544 cpp = _mesa_get_format_bytes(image->format);
545 image->region =
546 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
547 if (image->region == NULL) {
548 free(image);
549 return NULL;
550 }
551
552 intel_setup_image_from_dimensions(image);
553
554 return image;
555 }
556
557 static GLboolean
558 intel_query_image(__DRIimage *image, int attrib, int *value)
559 {
560 switch (attrib) {
561 case __DRI_IMAGE_ATTRIB_STRIDE:
562 *value = image->region->pitch;
563 return true;
564 case __DRI_IMAGE_ATTRIB_HANDLE:
565 *value = image->region->bo->handle;
566 return true;
567 case __DRI_IMAGE_ATTRIB_NAME:
568 return intel_region_flink(image->region, (uint32_t *) value);
569 case __DRI_IMAGE_ATTRIB_FORMAT:
570 *value = image->dri_format;
571 return true;
572 case __DRI_IMAGE_ATTRIB_WIDTH:
573 *value = image->region->width;
574 return true;
575 case __DRI_IMAGE_ATTRIB_HEIGHT:
576 *value = image->region->height;
577 return true;
578 case __DRI_IMAGE_ATTRIB_COMPONENTS:
579 if (image->planar_format == NULL)
580 return false;
581 *value = image->planar_format->components;
582 return true;
583 case __DRI_IMAGE_ATTRIB_FD:
584 if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
585 return true;
586 return false;
587 default:
588 return false;
589 }
590 }
591
592 static __DRIimage *
593 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
594 {
595 __DRIimage *image;
596
597 image = calloc(1, sizeof *image);
598 if (image == NULL)
599 return NULL;
600
601 intel_region_reference(&image->region, orig_image->region);
602 if (image->region == NULL) {
603 free(image);
604 return NULL;
605 }
606
607 image->internal_format = orig_image->internal_format;
608 image->planar_format = orig_image->planar_format;
609 image->dri_format = orig_image->dri_format;
610 image->format = orig_image->format;
611 image->offset = orig_image->offset;
612 image->width = orig_image->width;
613 image->height = orig_image->height;
614 image->tile_x = orig_image->tile_x;
615 image->tile_y = orig_image->tile_y;
616 image->has_depthstencil = orig_image->has_depthstencil;
617 image->data = loaderPrivate;
618
619 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
620 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
621
622 return image;
623 }
624
625 static GLboolean
626 intel_validate_usage(__DRIimage *image, unsigned int use)
627 {
628 if (use & __DRI_IMAGE_USE_CURSOR) {
629 if (image->region->width != 64 || image->region->height != 64)
630 return GL_FALSE;
631 }
632
633 return GL_TRUE;
634 }
635
636 static __DRIimage *
637 intel_create_image_from_names(__DRIscreen *screen,
638 int width, int height, int fourcc,
639 int *names, int num_names,
640 int *strides, int *offsets,
641 void *loaderPrivate)
642 {
643 struct intel_image_format *f = NULL;
644 __DRIimage *image;
645 int i, index;
646
647 if (screen == NULL || names == NULL || num_names != 1)
648 return NULL;
649
650 f = intel_image_format_lookup(fourcc);
651 if (f == NULL)
652 return NULL;
653
654 image = intel_create_image_from_name(screen, width, height,
655 __DRI_IMAGE_FORMAT_NONE,
656 names[0], strides[0],
657 loaderPrivate);
658
659 if (image == NULL)
660 return NULL;
661
662 image->planar_format = f;
663 for (i = 0; i < f->nplanes; i++) {
664 index = f->planes[i].buffer_index;
665 image->offsets[index] = offsets[index];
666 image->strides[index] = strides[index];
667 }
668
669 return image;
670 }
671
672 static __DRIimage *
673 intel_create_image_from_fds(__DRIscreen *screen,
674 int width, int height, int fourcc,
675 int *fds, int num_fds, int *strides, int *offsets,
676 void *loaderPrivate)
677 {
678 struct intel_screen *intelScreen = screen->driverPrivate;
679 struct intel_image_format *f;
680 __DRIimage *image;
681 int i, index;
682
683 if (fds == NULL || num_fds != 1)
684 return NULL;
685
686 f = intel_image_format_lookup(fourcc);
687 if (f == NULL)
688 return NULL;
689
690 if (f->nplanes == 1)
691 image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
692 else
693 image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
694
695 if (image == NULL)
696 return NULL;
697
698 image->region = intel_region_alloc_for_fd(intelScreen,
699 1, width, height,
700 strides[0], fds[0], "image");
701 if (image->region == NULL) {
702 free(image);
703 return NULL;
704 }
705
706 image->planar_format = f;
707 for (i = 0; i < f->nplanes; i++) {
708 index = f->planes[i].buffer_index;
709 image->offsets[index] = offsets[index];
710 image->strides[index] = strides[index];
711 }
712
713 intel_setup_image_from_dimensions(image);
714
715 return image;
716 }
717
718 static __DRIimage *
719 intel_create_image_from_dma_bufs(__DRIscreen *screen,
720 int width, int height, int fourcc,
721 int *fds, int num_fds,
722 int *strides, int *offsets,
723 enum __DRIYUVColorSpace yuv_color_space,
724 enum __DRISampleRange sample_range,
725 enum __DRIChromaSiting horizontal_siting,
726 enum __DRIChromaSiting vertical_siting,
727 unsigned *error,
728 void *loaderPrivate)
729 {
730 __DRIimage *image;
731 struct intel_image_format *f = intel_image_format_lookup(fourcc);
732
733 /* For now only packed formats that have native sampling are supported. */
734 if (!f || f->nplanes != 1) {
735 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
736 return NULL;
737 }
738
739 image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
740 num_fds, strides, offsets,
741 loaderPrivate);
742
743 /*
744 * Invalid parameters and any inconsistencies between are assumed to be
745 * checked by the caller. Therefore besides unsupported formats one can fail
746 * only in allocation.
747 */
748 if (!image) {
749 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
750 return NULL;
751 }
752
753 image->dma_buf_imported = true;
754 image->yuv_color_space = yuv_color_space;
755 image->sample_range = sample_range;
756 image->horizontal_siting = horizontal_siting;
757 image->vertical_siting = vertical_siting;
758
759 *error = __DRI_IMAGE_ERROR_SUCCESS;
760 return image;
761 }
762
763 static __DRIimage *
764 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
765 {
766 int width, height, offset, stride, dri_format, index;
767 struct intel_image_format *f;
768 uint32_t mask_x, mask_y;
769 __DRIimage *image;
770
771 if (parent == NULL || parent->planar_format == NULL)
772 return NULL;
773
774 f = parent->planar_format;
775
776 if (plane >= f->nplanes)
777 return NULL;
778
779 width = parent->region->width >> f->planes[plane].width_shift;
780 height = parent->region->height >> f->planes[plane].height_shift;
781 dri_format = f->planes[plane].dri_format;
782 index = f->planes[plane].buffer_index;
783 offset = parent->offsets[index];
784 stride = parent->strides[index];
785
786 image = intel_allocate_image(dri_format, loaderPrivate);
787 if (image == NULL)
788 return NULL;
789
790 if (offset + height * stride > parent->region->bo->size) {
791 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
792 free(image);
793 return NULL;
794 }
795
796 image->region = calloc(sizeof(*image->region), 1);
797 if (image->region == NULL) {
798 free(image);
799 return NULL;
800 }
801
802 image->region->cpp = _mesa_get_format_bytes(image->format);
803 image->region->width = width;
804 image->region->height = height;
805 image->region->pitch = stride;
806 image->region->refcount = 1;
807 image->region->bo = parent->region->bo;
808 drm_intel_bo_reference(image->region->bo);
809 image->region->tiling = parent->region->tiling;
810 image->offset = offset;
811 intel_setup_image_from_dimensions(image);
812
813 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
814 if (offset & mask_x)
815 _mesa_warning(NULL,
816 "intel_create_sub_image: offset not on tile boundary");
817
818 return image;
819 }
820
821 static struct __DRIimageExtensionRec intelImageExtension = {
822 .base = { __DRI_IMAGE, 8 },
823
824 .createImageFromName = intel_create_image_from_name,
825 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
826 .destroyImage = intel_destroy_image,
827 .createImage = intel_create_image,
828 .queryImage = intel_query_image,
829 .dupImage = intel_dup_image,
830 .validateUsage = intel_validate_usage,
831 .createImageFromNames = intel_create_image_from_names,
832 .fromPlanar = intel_from_planar,
833 .createImageFromTexture = intel_create_image_from_texture,
834 .createImageFromFds = intel_create_image_from_fds,
835 .createImageFromDmaBufs = intel_create_image_from_dma_bufs
836 };
837
838 static const __DRIextension *intelScreenExtensions[] = {
839 &intelTexBufferExtension.base,
840 &intelFlushExtension.base,
841 &intelImageExtension.base,
842 &dri2ConfigQueryExtension.base,
843 NULL
844 };
845
846 static bool
847 intel_get_param(__DRIscreen *psp, int param, int *value)
848 {
849 int ret;
850 struct drm_i915_getparam gp;
851
852 memset(&gp, 0, sizeof(gp));
853 gp.param = param;
854 gp.value = value;
855
856 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
857 if (ret) {
858 if (ret != -EINVAL)
859 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
860 return false;
861 }
862
863 return true;
864 }
865
866 static bool
867 intel_get_boolean(__DRIscreen *psp, int param)
868 {
869 int value = 0;
870 return intel_get_param(psp, param, &value) && value;
871 }
872
873 static void
874 intelDestroyScreen(__DRIscreen * sPriv)
875 {
876 struct intel_screen *intelScreen = sPriv->driverPrivate;
877
878 dri_bufmgr_destroy(intelScreen->bufmgr);
879 driDestroyOptionInfo(&intelScreen->optionCache);
880
881 free(intelScreen);
882 sPriv->driverPrivate = NULL;
883 }
884
885
886 /**
887 * This is called when we need to set up GL rendering to a new X window.
888 */
889 static GLboolean
890 intelCreateBuffer(__DRIscreen * driScrnPriv,
891 __DRIdrawable * driDrawPriv,
892 const struct gl_config * mesaVis, GLboolean isPixmap)
893 {
894 struct intel_renderbuffer *rb;
895 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
896 gl_format rgbFormat;
897 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
898 struct gl_framebuffer *fb;
899
900 if (isPixmap)
901 return false;
902
903 fb = CALLOC_STRUCT(gl_framebuffer);
904 if (!fb)
905 return false;
906
907 _mesa_initialize_window_framebuffer(fb, mesaVis);
908
909 if (mesaVis->redBits == 5)
910 rgbFormat = MESA_FORMAT_RGB565;
911 else if (mesaVis->sRGBCapable)
912 rgbFormat = MESA_FORMAT_SARGB8;
913 else if (mesaVis->alphaBits == 0)
914 rgbFormat = MESA_FORMAT_XRGB8888;
915 else {
916 rgbFormat = MESA_FORMAT_SARGB8;
917 fb->Visual.sRGBCapable = true;
918 }
919
920 /* setup the hardware-based renderbuffers */
921 rb = intel_create_renderbuffer(rgbFormat, num_samples);
922 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
923
924 if (mesaVis->doubleBufferMode) {
925 rb = intel_create_renderbuffer(rgbFormat, num_samples);
926 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
927 }
928
929 /*
930 * Assert here that the gl_config has an expected depth/stencil bit
931 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
932 * which constructs the advertised configs.)
933 */
934 if (mesaVis->depthBits == 24) {
935 assert(mesaVis->stencilBits == 8);
936
937 if (screen->hw_has_separate_stencil) {
938 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
939 num_samples);
940 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
941 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
942 num_samples);
943 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
944 } else {
945 /*
946 * Use combined depth/stencil. Note that the renderbuffer is
947 * attached to two attachment points.
948 */
949 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
950 num_samples);
951 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
952 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
953 }
954 }
955 else if (mesaVis->depthBits == 16) {
956 assert(mesaVis->stencilBits == 0);
957 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
958 num_samples);
959 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
960 }
961 else {
962 assert(mesaVis->depthBits == 0);
963 assert(mesaVis->stencilBits == 0);
964 }
965
966 /* now add any/all software-based renderbuffers we may need */
967 _swrast_add_soft_renderbuffers(fb,
968 false, /* never sw color */
969 false, /* never sw depth */
970 false, /* never sw stencil */
971 mesaVis->accumRedBits > 0,
972 false, /* never sw alpha */
973 false /* never sw aux */ );
974 driDrawPriv->driverPrivate = fb;
975
976 return true;
977 }
978
979 static void
980 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
981 {
982 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
983
984 _mesa_reference_framebuffer(&fb, NULL);
985 }
986
987 static bool
988 intel_init_bufmgr(struct intel_screen *intelScreen)
989 {
990 __DRIscreen *spriv = intelScreen->driScrnPriv;
991
992 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
993
994 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
995 if (intelScreen->bufmgr == NULL) {
996 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
997 __func__, __LINE__);
998 return false;
999 }
1000
1001 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
1002
1003 if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
1004 fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1005 return false;
1006 }
1007
1008 return true;
1009 }
1010
1011 /**
1012 * Override intel_screen.hw_has_separate_stencil with environment variable
1013 * INTEL_SEPARATE_STENCIL.
1014 *
1015 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1016 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1017 * is ignored.
1018 */
1019 static void
1020 intel_override_separate_stencil(struct intel_screen *screen)
1021 {
1022 const char *s = getenv("INTEL_SEPARATE_STENCIL");
1023 if (!s) {
1024 return;
1025 } else if (!strncmp("0", s, 2)) {
1026 screen->hw_has_separate_stencil = false;
1027 } else if (!strncmp("1", s, 2)) {
1028 screen->hw_has_separate_stencil = true;
1029 } else {
1030 fprintf(stderr,
1031 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1032 "invalid value and is ignored", s);
1033 }
1034 }
1035
1036 static bool
1037 intel_detect_swizzling(struct intel_screen *screen)
1038 {
1039 drm_intel_bo *buffer;
1040 unsigned long flags = 0;
1041 unsigned long aligned_pitch;
1042 uint32_t tiling = I915_TILING_X;
1043 uint32_t swizzle_mode = 0;
1044
1045 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1046 64, 64, 4,
1047 &tiling, &aligned_pitch, flags);
1048 if (buffer == NULL)
1049 return false;
1050
1051 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1052 drm_intel_bo_unreference(buffer);
1053
1054 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1055 return false;
1056 else
1057 return true;
1058 }
1059
1060 static __DRIconfig**
1061 intel_screen_make_configs(__DRIscreen *dri_screen)
1062 {
1063 static const gl_format formats[] = {
1064 MESA_FORMAT_RGB565,
1065 MESA_FORMAT_ARGB8888
1066 };
1067
1068 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1069 static const GLenum back_buffer_modes[] = {
1070 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1071 };
1072
1073 static const uint8_t singlesample_samples[1] = {0};
1074 static const uint8_t multisample_samples[2] = {4, 8};
1075
1076 struct intel_screen *screen = dri_screen->driverPrivate;
1077 uint8_t depth_bits[4], stencil_bits[4];
1078 __DRIconfig **configs = NULL;
1079
1080 /* Generate singlesample configs without accumulation buffer. */
1081 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1082 __DRIconfig **new_configs;
1083 int num_depth_stencil_bits = 2;
1084
1085 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1086 * buffer that has a different number of bits per pixel than the color
1087 * buffer, gen >= 6 supports this.
1088 */
1089 depth_bits[0] = 0;
1090 stencil_bits[0] = 0;
1091
1092 if (formats[i] == MESA_FORMAT_RGB565) {
1093 depth_bits[1] = 16;
1094 stencil_bits[1] = 0;
1095 if (screen->gen >= 6) {
1096 depth_bits[2] = 24;
1097 stencil_bits[2] = 8;
1098 num_depth_stencil_bits = 3;
1099 }
1100 } else {
1101 depth_bits[1] = 24;
1102 stencil_bits[1] = 8;
1103 }
1104
1105 new_configs = driCreateConfigs(formats[i],
1106 depth_bits,
1107 stencil_bits,
1108 num_depth_stencil_bits,
1109 back_buffer_modes, 2,
1110 singlesample_samples, 1,
1111 false);
1112 configs = driConcatConfigs(configs, new_configs);
1113 }
1114
1115 /* Generate the minimum possible set of configs that include an
1116 * accumulation buffer.
1117 */
1118 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1119 __DRIconfig **new_configs;
1120
1121 if (formats[i] == MESA_FORMAT_RGB565) {
1122 depth_bits[0] = 16;
1123 stencil_bits[0] = 0;
1124 } else {
1125 depth_bits[0] = 24;
1126 stencil_bits[0] = 8;
1127 }
1128
1129 new_configs = driCreateConfigs(formats[i],
1130 depth_bits, stencil_bits, 1,
1131 back_buffer_modes, 1,
1132 singlesample_samples, 1,
1133 true);
1134 configs = driConcatConfigs(configs, new_configs);
1135 }
1136
1137 /* Generate multisample configs.
1138 *
1139 * This loop breaks early, and hence is a no-op, on gen < 6.
1140 *
1141 * Multisample configs must follow the singlesample configs in order to
1142 * work around an X server bug present in 1.12. The X server chooses to
1143 * associate the first listed RGBA888-Z24S8 config, regardless of its
1144 * sample count, with the 32-bit depth visual used for compositing.
1145 *
1146 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1147 * supported. Singlebuffer configs are not supported because no one wants
1148 * them.
1149 */
1150 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1151 if (screen->gen < 6)
1152 break;
1153
1154 __DRIconfig **new_configs;
1155 const int num_depth_stencil_bits = 2;
1156 int num_msaa_modes = 0;
1157
1158 depth_bits[0] = 0;
1159 stencil_bits[0] = 0;
1160
1161 if (formats[i] == MESA_FORMAT_RGB565) {
1162 depth_bits[1] = 16;
1163 stencil_bits[1] = 0;
1164 } else {
1165 depth_bits[1] = 24;
1166 stencil_bits[1] = 8;
1167 }
1168
1169 if (screen->gen >= 7)
1170 num_msaa_modes = 2;
1171 else if (screen->gen == 6)
1172 num_msaa_modes = 1;
1173
1174 new_configs = driCreateConfigs(formats[i],
1175 depth_bits,
1176 stencil_bits,
1177 num_depth_stencil_bits,
1178 back_buffer_modes, 1,
1179 multisample_samples,
1180 num_msaa_modes,
1181 false);
1182 configs = driConcatConfigs(configs, new_configs);
1183 }
1184
1185 if (configs == NULL) {
1186 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1187 __LINE__);
1188 return NULL;
1189 }
1190
1191 return configs;
1192 }
1193
1194 static void
1195 set_max_gl_versions(struct intel_screen *screen)
1196 {
1197 __DRIscreen *psp = screen->driScrnPriv;
1198
1199 switch (screen->gen) {
1200 case 7:
1201 psp->max_gl_core_version = 31;
1202 psp->max_gl_compat_version = 30;
1203 psp->max_gl_es1_version = 11;
1204 psp->max_gl_es2_version = 30;
1205 break;
1206 case 6:
1207 psp->max_gl_core_version = 31;
1208 psp->max_gl_compat_version = 30;
1209 psp->max_gl_es1_version = 11;
1210 psp->max_gl_es2_version = 30;
1211 break;
1212 case 5:
1213 case 4:
1214 psp->max_gl_core_version = 0;
1215 psp->max_gl_compat_version = 21;
1216 psp->max_gl_es1_version = 11;
1217 psp->max_gl_es2_version = 20;
1218 break;
1219 default:
1220 assert(!"unrecognized intel_screen::gen");
1221 break;
1222 }
1223 }
1224
1225 /**
1226 * This is the driver specific part of the createNewScreen entry point.
1227 * Called when using DRI2.
1228 *
1229 * \return the struct gl_config supported by this driver
1230 */
1231 static const
1232 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1233 {
1234 struct intel_screen *intelScreen;
1235
1236 if (psp->dri2.loader->base.version <= 2 ||
1237 psp->dri2.loader->getBuffersWithFormat == NULL) {
1238 fprintf(stderr,
1239 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1240 "support required\n");
1241 return false;
1242 }
1243
1244 /* Allocate the private area */
1245 intelScreen = calloc(1, sizeof *intelScreen);
1246 if (!intelScreen) {
1247 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1248 return false;
1249 }
1250 /* parse information in __driConfigOptions */
1251 driParseOptionInfo(&intelScreen->optionCache, __driConfigOptions);
1252
1253 intelScreen->driScrnPriv = psp;
1254 psp->driverPrivate = (void *) intelScreen;
1255
1256 if (!intel_init_bufmgr(intelScreen))
1257 return false;
1258
1259 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1260
1261 if (IS_GEN7(intelScreen->deviceID)) {
1262 intelScreen->gen = 7;
1263 } else if (IS_GEN6(intelScreen->deviceID)) {
1264 intelScreen->gen = 6;
1265 } else if (IS_GEN5(intelScreen->deviceID)) {
1266 intelScreen->gen = 5;
1267 } else {
1268 intelScreen->gen = 4;
1269 }
1270
1271 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1272 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1273
1274 int has_llc = 0;
1275 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1276 &has_llc);
1277 if (success && has_llc)
1278 intelScreen->hw_has_llc = true;
1279 else if (!success && intelScreen->gen >= 6)
1280 intelScreen->hw_has_llc = true;
1281
1282 intel_override_separate_stencil(intelScreen);
1283
1284 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1285
1286 set_max_gl_versions(intelScreen);
1287
1288 psp->extensions = intelScreenExtensions;
1289
1290 return (const __DRIconfig**) intel_screen_make_configs(psp);
1291 }
1292
1293 struct intel_buffer {
1294 __DRIbuffer base;
1295 struct intel_region *region;
1296 };
1297
1298 static __DRIbuffer *
1299 intelAllocateBuffer(__DRIscreen *screen,
1300 unsigned attachment, unsigned format,
1301 int width, int height)
1302 {
1303 struct intel_buffer *intelBuffer;
1304 struct intel_screen *intelScreen = screen->driverPrivate;
1305
1306 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1307 attachment == __DRI_BUFFER_BACK_LEFT);
1308
1309 intelBuffer = calloc(1, sizeof *intelBuffer);
1310 if (intelBuffer == NULL)
1311 return NULL;
1312
1313 /* The front and back buffers are color buffers, which are X tiled. */
1314 intelBuffer->region = intel_region_alloc(intelScreen,
1315 I915_TILING_X,
1316 format / 8,
1317 width,
1318 height,
1319 true);
1320
1321 if (intelBuffer->region == NULL) {
1322 free(intelBuffer);
1323 return NULL;
1324 }
1325
1326 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1327
1328 intelBuffer->base.attachment = attachment;
1329 intelBuffer->base.cpp = intelBuffer->region->cpp;
1330 intelBuffer->base.pitch = intelBuffer->region->pitch;
1331
1332 return &intelBuffer->base;
1333 }
1334
1335 static void
1336 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1337 {
1338 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1339
1340 intel_region_release(&intelBuffer->region);
1341 free(intelBuffer);
1342 }
1343
1344
1345 const struct __DriverAPIRec driDriverAPI = {
1346 .InitScreen = intelInitScreen2,
1347 .DestroyScreen = intelDestroyScreen,
1348 .CreateContext = brwCreateContext,
1349 .DestroyContext = intelDestroyContext,
1350 .CreateBuffer = intelCreateBuffer,
1351 .DestroyBuffer = intelDestroyBuffer,
1352 .MakeCurrent = intelMakeCurrent,
1353 .UnbindContext = intelUnbindContext,
1354 .AllocateBuffer = intelAllocateBuffer,
1355 .ReleaseBuffer = intelReleaseBuffer
1356 };
1357
1358 /* This is the table of extensions that the loader will dlsym() for. */
1359 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1360 &driCoreExtension.base,
1361 &driDRI2Extension.base,
1362 NULL
1363 };