src/mesa/drivers/dri/i965/intel_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include <errno.h>
  29 #include <time.h>
  30 #include "main/glheader.h"
  31 #include "main/context.h"
  32 #include "main/framebuffer.h"
  33 #include "main/renderbuffer.h"
  34 #include "main/texobj.h"
  35 #include "main/hash.h"
  36 #include "main/fbobject.h"
  37 #include "main/version.h"
  38 #include "swrast/s_renderbuffer.h"
  39
  40 #include "utils.h"
  41 #include "xmlpool.h"
  42
  43 PUBLIC const char __driConfigOptions[] =
  44    DRI_CONF_BEGIN
  45    DRI_CONF_SECTION_PERFORMANCE
  46       DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
  47       /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
  48        * DRI_CONF_BO_REUSE_ALL
  49        */
  50       DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
  51          DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
  52             DRI_CONF_ENUM(0, "Disable buffer object reuse")
  53             DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
  54          DRI_CONF_DESC_END
  55       DRI_CONF_OPT_END
  56
  57       DRI_CONF_OPT_BEGIN_B(hiz, "true")
  58          DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
  59       DRI_CONF_OPT_END
  60
  61    DRI_CONF_SECTION_END
  62    DRI_CONF_SECTION_QUALITY
  63       DRI_CONF_FORCE_S3TC_ENABLE("false")
  64    DRI_CONF_SECTION_END
  65    DRI_CONF_SECTION_DEBUG
  66       DRI_CONF_NO_RAST("false")
  67       DRI_CONF_ALWAYS_FLUSH_BATCH("false")
  68       DRI_CONF_ALWAYS_FLUSH_CACHE("false")
  69       DRI_CONF_DISABLE_THROTTLING("false")
  70       DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
  71       DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
  72       DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
  73
  74       DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
  75          DRI_CONF_DESC(en, "Perform code generation at shader link time.")
  76       DRI_CONF_OPT_END
  77    DRI_CONF_SECTION_END
  78 DRI_CONF_END;
  79
  80 #include "intel_batchbuffer.h"
  81 #include "intel_buffers.h"
  82 #include "intel_bufmgr.h"
  83 #include "intel_chipset.h"
  84 #include "intel_fbo.h"
  85 #include "intel_mipmap_tree.h"
  86 #include "intel_screen.h"
  87 #include "intel_tex.h"
  88 #include "intel_regions.h"
  89
  90 #include "brw_context.h"
  91
  92 #include "i915_drm.h"
  93
  94 #ifdef USE_NEW_INTERFACE
  95 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
  96 #endif /*USE_NEW_INTERFACE */
  97
  98 /**
  99  * For debugging purposes, this returns a time in seconds.
 100  */
 101 double
 102 get_time(void)
 103 {
 104    struct timespec tp;
 105
 106    clock_gettime(CLOCK_MONOTONIC, &tp);
 107
 108    return tp.tv_sec + tp.tv_nsec / 1000000000.0;
 109 }
 110
 111 void
 112 aub_dump_bmp(struct gl_context *ctx)
 113 {
 114    struct gl_framebuffer *fb = ctx->DrawBuffer;
 115
 116    for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
 117       struct intel_renderbuffer *irb =
 118          intel_renderbuffer(fb->_ColorDrawBuffers[i]);
 119
 120       if (irb && irb->mt) {
 121          enum aub_dump_bmp_format format;
 122
 123          switch (irb->Base.Base.Format) {
 124          case MESA_FORMAT_ARGB8888:
 125          case MESA_FORMAT_XRGB8888:
 126             format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
 127             break;
 128          default:
 129             continue;
 130          }
 131
 132          assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
 133          drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
 134                                        irb->draw_x,
 135                                        irb->draw_y,
 136                                        irb->Base.Base.Width,
 137                                        irb->Base.Base.Height,
 138                                        format,
 139                                        irb->mt->region->pitch,
 140                                        0);
 141       }
 142    }
 143 }
 144
 145 static const __DRItexBufferExtension intelTexBufferExtension = {
 146    .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 147
 148    .setTexBuffer        = intelSetTexBuffer,
 149    .setTexBuffer2       = intelSetTexBuffer2,
 150    .releaseTexBuffer    = NULL,
 151 };
 152
 153 static void
 154 intel_dri2_flush_with_flags(__DRIcontext *cPriv,
 155                             __DRIdrawable *dPriv,
 156                             unsigned flags,
 157                             enum __DRI2throttleReason reason)
 158 {
 159    struct brw_context *brw = cPriv->driverPrivate;
 160
 161    if (!brw)
 162       return;
 163
 164    struct gl_context *ctx = &brw->ctx;
 165
 166    FLUSH_VERTICES(ctx, 0);
 167
 168    if (flags & __DRI2_FLUSH_DRAWABLE)
 169       intel_resolve_for_dri2_flush(brw, dPriv);
 170
 171    if (reason == __DRI2_THROTTLE_SWAPBUFFER ||
 172        reason == __DRI2_THROTTLE_FLUSHFRONT) {
 173       brw->need_throttle = true;
 174    }
 175
 176    intel_batchbuffer_flush(brw);
 177
 178    if (INTEL_DEBUG & DEBUG_AUB) {
 179       aub_dump_bmp(ctx);
 180    }
 181 }
 182
 183 /**
 184  * Provides compatibility with loaders that only support the older (version
 185  * 1-3) flush interface.
 186  *
 187  * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
 188  */
 189 static void
 190 intel_dri2_flush(__DRIdrawable *drawable)
 191 {
 192    intel_dri2_flush_with_flags(drawable->driContextPriv, drawable,
 193                                __DRI2_FLUSH_DRAWABLE,
 194                                __DRI2_THROTTLE_SWAPBUFFER);
 195 }
 196
 197 static const struct __DRI2flushExtensionRec intelFlushExtension = {
 198     .base = { __DRI2_FLUSH, 4 },
 199
 200     .flush              = intel_dri2_flush,
 201     .invalidate         = dri2InvalidateDrawable,
 202     .flush_with_flags   = intel_dri2_flush_with_flags,
 203 };
 204
 205 static struct intel_image_format intel_image_formats[] = {
 206    { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
 207      { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
 208
 209    { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
 210      { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
 211
 212    { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 213      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 214        { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
 215        { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
 216
 217    { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 218      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 219        { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 220        { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 221
 222    { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 223      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 224        { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
 225        { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
 226
 227    { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 228      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 229        { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 230        { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 231
 232    { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 233      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 234        { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 235        { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 236
 237    { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
 238      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 239        { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
 240
 241    { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
 242      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 243        { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
 244
 245    /* For YUYV buffers, we set up two overlapping DRI images and treat
 246     * them as planar buffers in the compositors.  Plane 0 is GR88 and
 247     * samples YU or YV pairs and places Y into the R component, while
 248     * plane 1 is ARGB and samples YUYV clusters and places pairs and
 249     * places U into the G component and V into A.  This lets the
 250     * texture sampler interpolate the Y components correctly when
 251     * sampling from plane 0, and interpolate U and V correctly when
 252     * sampling from plane 1. */
 253    { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
 254      { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
 255        { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
 256 };
 257
 258 static struct intel_image_format *
 259 intel_image_format_lookup(int fourcc)
 260 {
 261    struct intel_image_format *f = NULL;
 262
 263    for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
 264       if (intel_image_formats[i].fourcc == fourcc) {
 265          f = &intel_image_formats[i];
 266          break;
 267       }
 268    }
 269
 270    return f;
 271 }
 272
 273 static __DRIimage *
 274 intel_allocate_image(int dri_format, void *loaderPrivate)
 275 {
 276     __DRIimage *image;
 277
 278     image = calloc(1, sizeof *image);
 279     if (image == NULL)
 280         return NULL;
 281
 282     image->dri_format = dri_format;
 283     image->offset = 0;
 284
 285     switch (dri_format) {
 286     case __DRI_IMAGE_FORMAT_RGB565:
 287        image->format = MESA_FORMAT_RGB565;
 288        break;
 289     case __DRI_IMAGE_FORMAT_XRGB8888:
 290        image->format = MESA_FORMAT_XRGB8888;
 291        break;
 292     case __DRI_IMAGE_FORMAT_ARGB8888:
 293        image->format = MESA_FORMAT_ARGB8888;
 294        break;
 295     case __DRI_IMAGE_FORMAT_ABGR8888:
 296        image->format = MESA_FORMAT_RGBA8888_REV;
 297        break;
 298     case __DRI_IMAGE_FORMAT_XBGR8888:
 299        image->format = MESA_FORMAT_RGBX8888_REV;
 300        break;
 301     case __DRI_IMAGE_FORMAT_R8:
 302        image->format = MESA_FORMAT_R8;
 303        break;
 304     case __DRI_IMAGE_FORMAT_GR88:
 305        image->format = MESA_FORMAT_GR88;
 306        break;
 307     case __DRI_IMAGE_FORMAT_NONE:
 308        image->format = MESA_FORMAT_NONE;
 309        break;
 310     default:
 311        free(image);
 312        return NULL;
 313     }
 314
 315     image->internal_format = _mesa_get_format_base_format(image->format);
 316     image->data = loaderPrivate;
 317
 318     return image;
 319 }
 320
 321 /**
 322  * Sets up a DRIImage structure to point to our shared image in a region
 323  */
 324 static void
 325 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
 326                                    struct intel_mipmap_tree *mt, GLuint level,
 327                                    GLuint zoffset)
 328 {
 329    unsigned int draw_x, draw_y;
 330    uint32_t mask_x, mask_y;
 331
 332    intel_miptree_make_shareable(brw, mt);
 333
 334    intel_miptree_check_level_layer(mt, level, zoffset);
 335
 336    intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
 337    intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
 338
 339    image->width = mt->level[level].width;
 340    image->height = mt->level[level].height;
 341    image->tile_x = draw_x & mask_x;
 342    image->tile_y = draw_y & mask_y;
 343
 344    image->offset = intel_region_get_aligned_offset(mt->region,
 345                                                    draw_x & ~mask_x,
 346                                                    draw_y & ~mask_y,
 347                                                    false);
 348
 349    intel_region_reference(&image->region, mt->region);
 350 }
 351
 352 static void
 353 intel_setup_image_from_dimensions(__DRIimage *image)
 354 {
 355    image->width    = image->region->width;
 356    image->height   = image->region->height;
 357    image->tile_x = 0;
 358    image->tile_y = 0;
 359    image->has_depthstencil = false;
 360 }
 361
 362 static inline uint32_t
 363 intel_dri_format(GLuint format)
 364 {
 365    switch (format) {
 366    case MESA_FORMAT_RGB565:
 367       return __DRI_IMAGE_FORMAT_RGB565;
 368    case MESA_FORMAT_XRGB8888:
 369       return __DRI_IMAGE_FORMAT_XRGB8888;
 370    case MESA_FORMAT_ARGB8888:
 371       return __DRI_IMAGE_FORMAT_ARGB8888;
 372    case MESA_FORMAT_RGBA8888_REV:
 373       return __DRI_IMAGE_FORMAT_ABGR8888;
 374    case MESA_FORMAT_R8:
 375       return __DRI_IMAGE_FORMAT_R8;
 376    case MESA_FORMAT_RG88:
 377       return __DRI_IMAGE_FORMAT_GR88;
 378    }
 379
 380    return MESA_FORMAT_NONE;
 381 }
 382
 383 static __DRIimage *
 384 intel_create_image_from_name(__DRIscreen *screen,
 385                              int width, int height, int format,
 386                              int name, int pitch, void *loaderPrivate)
 387 {
 388     struct intel_screen *intelScreen = screen->driverPrivate;
 389     __DRIimage *image;
 390     int cpp;
 391
 392     image = intel_allocate_image(format, loaderPrivate);
 393     if (image == NULL)
 394        return NULL;
 395
 396     if (image->format == MESA_FORMAT_NONE)
 397        cpp = 1;
 398     else
 399        cpp = _mesa_get_format_bytes(image->format);
 400     image->region = intel_region_alloc_for_handle(intelScreen,
 401                                                   cpp, width, height,
 402                                                   pitch * cpp, name, "image");
 403     if (image->region == NULL) {
 404        free(image);
 405        return NULL;
 406     }
 407
 408     intel_setup_image_from_dimensions(image);
 409
 410     return image;
 411 }
 412
 413 static __DRIimage *
 414 intel_create_image_from_renderbuffer(__DRIcontext *context,
 415                                      int renderbuffer, void *loaderPrivate)
 416 {
 417    __DRIimage *image;
 418    struct brw_context *brw = context->driverPrivate;
 419    struct gl_context *ctx = &brw->ctx;
 420    struct gl_renderbuffer *rb;
 421    struct intel_renderbuffer *irb;
 422
 423    rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
 424    if (!rb) {
 425       _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 426       return NULL;
 427    }
 428
 429    irb = intel_renderbuffer(rb);
 430    intel_miptree_make_shareable(brw, irb->mt);
 431    image = calloc(1, sizeof *image);
 432    if (image == NULL)
 433       return NULL;
 434
 435    image->internal_format = rb->InternalFormat;
 436    image->format = rb->Format;
 437    image->offset = 0;
 438    image->data = loaderPrivate;
 439    intel_region_reference(&image->region, irb->mt->region);
 440    intel_setup_image_from_dimensions(image);
 441    image->dri_format = intel_dri_format(image->format);
 442    image->has_depthstencil = irb->mt->stencil_mt? true : false;
 443
 444    rb->NeedsFinishRenderTexture = true;
 445    return image;
 446 }
 447
 448 static __DRIimage *
 449 intel_create_image_from_texture(__DRIcontext *context, int target,
 450                                 unsigned texture, int zoffset,
 451                                 int level,
 452                                 unsigned *error,
 453                                 void *loaderPrivate)
 454 {
 455    __DRIimage *image;
 456    struct brw_context *brw = context->driverPrivate;
 457    struct gl_texture_object *obj;
 458    struct intel_texture_object *iobj;
 459    GLuint face = 0;
 460
 461    obj = _mesa_lookup_texture(&brw->ctx, texture);
 462    if (!obj || obj->Target != target) {
 463       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 464       return NULL;
 465    }
 466
 467    if (target == GL_TEXTURE_CUBE_MAP)
 468       face = zoffset;
 469
 470    _mesa_test_texobj_completeness(&brw->ctx, obj);
 471    iobj = intel_texture_object(obj);
 472    if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
 473       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 474       return NULL;
 475    }
 476
 477    if (level < obj->BaseLevel || level > obj->_MaxLevel) {
 478       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 479       return NULL;
 480    }
 481
 482    if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
 483       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 484       return NULL;
 485    }
 486    image = calloc(1, sizeof *image);
 487    if (image == NULL) {
 488       *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
 489       return NULL;
 490    }
 491
 492    image->internal_format = obj->Image[face][level]->InternalFormat;
 493    image->format = obj->Image[face][level]->TexFormat;
 494    image->data = loaderPrivate;
 495    intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
 496    image->dri_format = intel_dri_format(image->format);
 497    image->has_depthstencil = iobj->mt->stencil_mt? true : false;
 498    if (image->dri_format == MESA_FORMAT_NONE) {
 499       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 500       free(image);
 501       return NULL;
 502    }
 503
 504    *error = __DRI_IMAGE_ERROR_SUCCESS;
 505    return image;
 506 }
 507
 508 static void
 509 intel_destroy_image(__DRIimage *image)
 510 {
 511     intel_region_release(&image->region);
 512     free(image);
 513 }
 514
 515 static __DRIimage *
 516 intel_create_image(__DRIscreen *screen,
 517                    int width, int height, int format,
 518                    unsigned int use,
 519                    void *loaderPrivate)
 520 {
 521    __DRIimage *image;
 522    struct intel_screen *intelScreen = screen->driverPrivate;
 523    uint32_t tiling;
 524    int cpp;
 525
 526    tiling = I915_TILING_X;
 527    if (use & __DRI_IMAGE_USE_CURSOR) {
 528       if (width != 64 || height != 64)
 529          return NULL;
 530       tiling = I915_TILING_NONE;
 531    }
 532
 533    if (use & __DRI_IMAGE_USE_LINEAR)
 534       tiling = I915_TILING_NONE;
 535
 536    image = intel_allocate_image(format, loaderPrivate);
 537    if (image == NULL)
 538       return NULL;
 539
 540    cpp = _mesa_get_format_bytes(image->format);
 541    image->region =
 542       intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
 543    if (image->region == NULL) {
 544       free(image);
 545       return NULL;
 546    }
 547
 548    intel_setup_image_from_dimensions(image);
 549
 550    return image;
 551 }
 552
 553 static GLboolean
 554 intel_query_image(__DRIimage *image, int attrib, int *value)
 555 {
 556    switch (attrib) {
 557    case __DRI_IMAGE_ATTRIB_STRIDE:
 558       *value = image->region->pitch;
 559       return true;
 560    case __DRI_IMAGE_ATTRIB_HANDLE:
 561       *value = image->region->bo->handle;
 562       return true;
 563    case __DRI_IMAGE_ATTRIB_NAME:
 564       return intel_region_flink(image->region, (uint32_t *) value);
 565    case __DRI_IMAGE_ATTRIB_FORMAT:
 566       *value = image->dri_format;
 567       return true;
 568    case __DRI_IMAGE_ATTRIB_WIDTH:
 569       *value = image->region->width;
 570       return true;
 571    case __DRI_IMAGE_ATTRIB_HEIGHT:
 572       *value = image->region->height;
 573       return true;
 574    case __DRI_IMAGE_ATTRIB_COMPONENTS:
 575       if (image->planar_format == NULL)
 576          return false;
 577       *value = image->planar_format->components;
 578       return true;
 579    case __DRI_IMAGE_ATTRIB_FD:
 580       if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
 581          return true;
 582       return false;
 583   default:
 584       return false;
 585    }
 586 }
 587
 588 static __DRIimage *
 589 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
 590 {
 591    __DRIimage *image;
 592
 593    image = calloc(1, sizeof *image);
 594    if (image == NULL)
 595       return NULL;
 596
 597    intel_region_reference(&image->region, orig_image->region);
 598    if (image->region == NULL) {
 599       free(image);
 600       return NULL;
 601    }
 602
 603    image->internal_format = orig_image->internal_format;
 604    image->planar_format   = orig_image->planar_format;
 605    image->dri_format      = orig_image->dri_format;
 606    image->format          = orig_image->format;
 607    image->offset          = orig_image->offset;
 608    image->width           = orig_image->width;
 609    image->height          = orig_image->height;
 610    image->tile_x          = orig_image->tile_x;
 611    image->tile_y          = orig_image->tile_y;
 612    image->has_depthstencil = orig_image->has_depthstencil;
 613    image->data            = loaderPrivate;
 614
 615    memcpy(image->strides, orig_image->strides, sizeof(image->strides));
 616    memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
 617
 618    return image;
 619 }
 620
 621 static GLboolean
 622 intel_validate_usage(__DRIimage *image, unsigned int use)
 623 {
 624    if (use & __DRI_IMAGE_USE_CURSOR) {
 625       if (image->region->width != 64 || image->region->height != 64)
 626          return GL_FALSE;
 627    }
 628
 629    return GL_TRUE;
 630 }
 631
 632 static __DRIimage *
 633 intel_create_image_from_names(__DRIscreen *screen,
 634                               int width, int height, int fourcc,
 635                               int *names, int num_names,
 636                               int *strides, int *offsets,
 637                               void *loaderPrivate)
 638 {
 639     struct intel_image_format *f = NULL;
 640     __DRIimage *image;
 641     int i, index;
 642
 643     if (screen == NULL || names == NULL || num_names != 1)
 644         return NULL;
 645
 646     f = intel_image_format_lookup(fourcc);
 647     if (f == NULL)
 648         return NULL;
 649
 650     image = intel_create_image_from_name(screen, width, height,
 651                                          __DRI_IMAGE_FORMAT_NONE,
 652                                          names[0], strides[0],
 653                                          loaderPrivate);
 654
 655    if (image == NULL)
 656       return NULL;
 657
 658     image->planar_format = f;
 659     for (i = 0; i < f->nplanes; i++) {
 660         index = f->planes[i].buffer_index;
 661         image->offsets[index] = offsets[index];
 662         image->strides[index] = strides[index];
 663     }
 664
 665     return image;
 666 }
 667
 668 static __DRIimage *
 669 intel_create_image_from_fds(__DRIscreen *screen,
 670                             int width, int height, int fourcc,
 671                             int *fds, int num_fds, int *strides, int *offsets,
 672                             void *loaderPrivate)
 673 {
 674    struct intel_screen *intelScreen = screen->driverPrivate;
 675    struct intel_image_format *f;
 676    __DRIimage *image;
 677    int i, index;
 678
 679    if (fds == NULL || num_fds != 1)
 680       return NULL;
 681
 682    f = intel_image_format_lookup(fourcc);
 683    if (f == NULL)
 684       return NULL;
 685
 686    if (f->nplanes == 1)
 687       image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
 688    else
 689       image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
 690
 691    if (image == NULL)
 692       return NULL;
 693
 694    image->region = intel_region_alloc_for_fd(intelScreen,
 695                                              1, width, height,
 696                                              strides[0], fds[0], "image");
 697    if (image->region == NULL) {
 698       free(image);
 699       return NULL;
 700    }
 701
 702    image->planar_format = f;
 703    for (i = 0; i < f->nplanes; i++) {
 704       index = f->planes[i].buffer_index;
 705       image->offsets[index] = offsets[index];
 706       image->strides[index] = strides[index];
 707    }
 708
 709    intel_setup_image_from_dimensions(image);
 710
 711    return image;
 712 }
 713
 714 static __DRIimage *
 715 intel_create_image_from_dma_bufs(__DRIscreen *screen,
 716                                  int width, int height, int fourcc,
 717                                  int *fds, int num_fds,
 718                                  int *strides, int *offsets,
 719                                  enum __DRIYUVColorSpace yuv_color_space,
 720                                  enum __DRISampleRange sample_range,
 721                                  enum __DRIChromaSiting horizontal_siting,
 722                                  enum __DRIChromaSiting vertical_siting,
 723                                  unsigned *error,
 724                                  void *loaderPrivate)
 725 {
 726    __DRIimage *image;
 727    struct intel_image_format *f = intel_image_format_lookup(fourcc);
 728
 729    /* For now only packed formats that have native sampling are supported. */
 730    if (!f || f->nplanes != 1) {
 731       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 732       return NULL;
 733    }
 734
 735    image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
 736                                        num_fds, strides, offsets,
 737                                        loaderPrivate);
 738
 739    /*
 740     * Invalid parameters and any inconsistencies between are assumed to be
 741     * checked by the caller. Therefore besides unsupported formats one can fail
 742     * only in allocation.
 743     */
 744    if (!image) {
 745       *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
 746       return NULL;
 747    }
 748
 749    image->dma_buf_imported = true;
 750    image->yuv_color_space = yuv_color_space;
 751    image->sample_range = sample_range;
 752    image->horizontal_siting = horizontal_siting;
 753    image->vertical_siting = vertical_siting;
 754
 755    *error = __DRI_IMAGE_ERROR_SUCCESS;
 756    return image;
 757 }
 758
 759 static __DRIimage *
 760 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
 761 {
 762     int width, height, offset, stride, dri_format, index;
 763     struct intel_image_format *f;
 764     uint32_t mask_x, mask_y;
 765     __DRIimage *image;
 766
 767     if (parent == NULL || parent->planar_format == NULL)
 768         return NULL;
 769
 770     f = parent->planar_format;
 771
 772     if (plane >= f->nplanes)
 773         return NULL;
 774
 775     width = parent->region->width >> f->planes[plane].width_shift;
 776     height = parent->region->height >> f->planes[plane].height_shift;
 777     dri_format = f->planes[plane].dri_format;
 778     index = f->planes[plane].buffer_index;
 779     offset = parent->offsets[index];
 780     stride = parent->strides[index];
 781
 782     image = intel_allocate_image(dri_format, loaderPrivate);
 783     if (image == NULL)
 784        return NULL;
 785
 786     if (offset + height * stride > parent->region->bo->size) {
 787        _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
 788        free(image);
 789        return NULL;
 790     }
 791
 792     image->region = calloc(sizeof(*image->region), 1);
 793     if (image->region == NULL) {
 794        free(image);
 795        return NULL;
 796     }
 797
 798     image->region->cpp = _mesa_get_format_bytes(image->format);
 799     image->region->width = width;
 800     image->region->height = height;
 801     image->region->pitch = stride;
 802     image->region->refcount = 1;
 803     image->region->bo = parent->region->bo;
 804     drm_intel_bo_reference(image->region->bo);
 805     image->region->tiling = parent->region->tiling;
 806     image->offset = offset;
 807     intel_setup_image_from_dimensions(image);
 808
 809     intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
 810     if (offset & mask_x)
 811        _mesa_warning(NULL,
 812                      "intel_create_sub_image: offset not on tile boundary");
 813
 814     return image;
 815 }
 816
 817 static struct __DRIimageExtensionRec intelImageExtension = {
 818     .base = { __DRI_IMAGE, 8 },
 819
 820     .createImageFromName                = intel_create_image_from_name,
 821     .createImageFromRenderbuffer        = intel_create_image_from_renderbuffer,
 822     .destroyImage                       = intel_destroy_image,
 823     .createImage                        = intel_create_image,
 824     .queryImage                         = intel_query_image,
 825     .dupImage                           = intel_dup_image,
 826     .validateUsage                      = intel_validate_usage,
 827     .createImageFromNames               = intel_create_image_from_names,
 828     .fromPlanar                         = intel_from_planar,
 829     .createImageFromTexture             = intel_create_image_from_texture,
 830     .createImageFromFds                 = intel_create_image_from_fds,
 831     .createImageFromDmaBufs             = intel_create_image_from_dma_bufs
 832 };
 833
 834 static const __DRIextension *intelScreenExtensions[] = {
 835     &intelTexBufferExtension.base,
 836     &intelFlushExtension.base,
 837     &intelImageExtension.base,
 838     &dri2ConfigQueryExtension.base,
 839     NULL
 840 };
 841
 842 static bool
 843 intel_get_param(__DRIscreen *psp, int param, int *value)
 844 {
 845    int ret;
 846    struct drm_i915_getparam gp;
 847
 848    memset(&gp, 0, sizeof(gp));
 849    gp.param = param;
 850    gp.value = value;
 851
 852    ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
 853    if (ret) {
 854       if (ret != -EINVAL)
 855          _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
 856       return false;
 857    }
 858
 859    return true;
 860 }
 861
 862 static bool
 863 intel_get_boolean(__DRIscreen *psp, int param)
 864 {
 865    int value = 0;
 866    return intel_get_param(psp, param, &value) && value;
 867 }
 868
 869 static void
 870 intelDestroyScreen(__DRIscreen * sPriv)
 871 {
 872    struct intel_screen *intelScreen = sPriv->driverPrivate;
 873
 874    dri_bufmgr_destroy(intelScreen->bufmgr);
 875    driDestroyOptionInfo(&intelScreen->optionCache);
 876
 877    free(intelScreen);
 878    sPriv->driverPrivate = NULL;
 879 }
 880
 881
 882 /**
 883  * This is called when we need to set up GL rendering to a new X window.
 884  */
 885 static GLboolean
 886 intelCreateBuffer(__DRIscreen * driScrnPriv,
 887                   __DRIdrawable * driDrawPriv,
 888                   const struct gl_config * mesaVis, GLboolean isPixmap)
 889 {
 890    struct intel_renderbuffer *rb;
 891    struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
 892    gl_format rgbFormat;
 893    unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
 894    struct gl_framebuffer *fb;
 895
 896    if (isPixmap)
 897       return false;
 898
 899    fb = CALLOC_STRUCT(gl_framebuffer);
 900    if (!fb)
 901       return false;
 902
 903    _mesa_initialize_window_framebuffer(fb, mesaVis);
 904
 905    if (mesaVis->redBits == 5)
 906       rgbFormat = MESA_FORMAT_RGB565;
 907    else if (mesaVis->sRGBCapable)
 908       rgbFormat = MESA_FORMAT_SARGB8;
 909    else if (mesaVis->alphaBits == 0)
 910       rgbFormat = MESA_FORMAT_XRGB8888;
 911    else {
 912       rgbFormat = MESA_FORMAT_SARGB8;
 913       fb->Visual.sRGBCapable = true;
 914    }
 915
 916    /* setup the hardware-based renderbuffers */
 917    rb = intel_create_renderbuffer(rgbFormat, num_samples);
 918    _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
 919
 920    if (mesaVis->doubleBufferMode) {
 921       rb = intel_create_renderbuffer(rgbFormat, num_samples);
 922       _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
 923    }
 924
 925    /*
 926     * Assert here that the gl_config has an expected depth/stencil bit
 927     * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
 928     * which constructs the advertised configs.)
 929     */
 930    if (mesaVis->depthBits == 24) {
 931       assert(mesaVis->stencilBits == 8);
 932
 933       if (screen->hw_has_separate_stencil) {
 934          rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
 935                                                 num_samples);
 936          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
 937          rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
 938                                                 num_samples);
 939          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
 940       } else {
 941          /*
 942           * Use combined depth/stencil. Note that the renderbuffer is
 943           * attached to two attachment points.
 944           */
 945          rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
 946                                                 num_samples);
 947          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
 948          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
 949       }
 950    }
 951    else if (mesaVis->depthBits == 16) {
 952       assert(mesaVis->stencilBits == 0);
 953       rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
 954                                              num_samples);
 955       _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
 956    }
 957    else {
 958       assert(mesaVis->depthBits == 0);
 959       assert(mesaVis->stencilBits == 0);
 960    }
 961
 962    /* now add any/all software-based renderbuffers we may need */
 963    _swrast_add_soft_renderbuffers(fb,
 964                                   false, /* never sw color */
 965                                   false, /* never sw depth */
 966                                   false, /* never sw stencil */
 967                                   mesaVis->accumRedBits > 0,
 968                                   false, /* never sw alpha */
 969                                   false  /* never sw aux */ );
 970    driDrawPriv->driverPrivate = fb;
 971
 972    return true;
 973 }
 974
 975 static void
 976 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
 977 {
 978     struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
 979
 980     _mesa_reference_framebuffer(&fb, NULL);
 981 }
 982
 983 static GLboolean
 984 intelCreateContext(gl_api api,
 985                    const struct gl_config * mesaVis,
 986                    __DRIcontext * driContextPriv,
 987                    unsigned major_version,
 988                    unsigned minor_version,
 989                    uint32_t flags,
 990                    unsigned *error,
 991                    void *sharedContextPrivate)
 992 {
 993    bool success = false;
 994
 995    success = brwCreateContext(api, mesaVis,
 996                               driContextPriv,
 997                               major_version, minor_version, flags,
 998                               error, sharedContextPrivate);
 999
1000    if (success)
1001       return true;
1002
1003    if (driContextPriv->driverPrivate != NULL)
1004       intelDestroyContext(driContextPriv);
1005
1006    return false;
1007 }
1008
1009 static bool
1010 intel_init_bufmgr(struct intel_screen *intelScreen)
1011 {
1012    __DRIscreen *spriv = intelScreen->driScrnPriv;
1013
1014    intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
1015
1016    intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
1017    if (intelScreen->bufmgr == NULL) {
1018       fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
1019               __func__, __LINE__);
1020       return false;
1021    }
1022
1023    drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
1024
1025    if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
1026       fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1027       return false;
1028    }
1029
1030    return true;
1031 }
1032
1033 /**
1034  * Override intel_screen.hw_has_separate_stencil with environment variable
1035  * INTEL_SEPARATE_STENCIL.
1036  *
1037  * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1038  * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1039  * is ignored.
1040  */
1041 static void
1042 intel_override_separate_stencil(struct intel_screen *screen)
1043 {
1044    const char *s = getenv("INTEL_SEPARATE_STENCIL");
1045    if (!s) {
1046       return;
1047    } else if (!strncmp("0", s, 2)) {
1048       screen->hw_has_separate_stencil = false;
1049    } else if (!strncmp("1", s, 2)) {
1050       screen->hw_has_separate_stencil = true;
1051    } else {
1052       fprintf(stderr,
1053               "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1054               "invalid value and is ignored", s);
1055    }
1056 }
1057
1058 static bool
1059 intel_detect_swizzling(struct intel_screen *screen)
1060 {
1061    drm_intel_bo *buffer;
1062    unsigned long flags = 0;
1063    unsigned long aligned_pitch;
1064    uint32_t tiling = I915_TILING_X;
1065    uint32_t swizzle_mode = 0;
1066
1067    buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1068                                      64, 64, 4,
1069                                      &tiling, &aligned_pitch, flags);
1070    if (buffer == NULL)
1071       return false;
1072
1073    drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1074    drm_intel_bo_unreference(buffer);
1075
1076    if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1077       return false;
1078    else
1079       return true;
1080 }
1081
1082 static __DRIconfig**
1083 intel_screen_make_configs(__DRIscreen *dri_screen)
1084 {
1085    static const gl_format formats[] = {
1086       MESA_FORMAT_RGB565,
1087       MESA_FORMAT_ARGB8888
1088    };
1089
1090    /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1091    static const GLenum back_buffer_modes[] = {
1092        GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1093    };
1094
1095    static const uint8_t singlesample_samples[1] = {0};
1096    static const uint8_t multisample_samples[2]  = {4, 8};
1097
1098    struct intel_screen *screen = dri_screen->driverPrivate;
1099    uint8_t depth_bits[4], stencil_bits[4];
1100    __DRIconfig **configs = NULL;
1101
1102    /* Generate singlesample configs without accumulation buffer. */
1103    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1104       __DRIconfig **new_configs;
1105       int num_depth_stencil_bits = 2;
1106
1107       /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1108        * buffer that has a different number of bits per pixel than the color
1109        * buffer, gen >= 6 supports this.
1110        */
1111       depth_bits[0] = 0;
1112       stencil_bits[0] = 0;
1113
1114       if (formats[i] == MESA_FORMAT_RGB565) {
1115          depth_bits[1] = 16;
1116          stencil_bits[1] = 0;
1117          if (screen->gen >= 6) {
1118              depth_bits[2] = 24;
1119              stencil_bits[2] = 8;
1120              num_depth_stencil_bits = 3;
1121          }
1122       } else {
1123          depth_bits[1] = 24;
1124          stencil_bits[1] = 8;
1125       }
1126
1127       new_configs = driCreateConfigs(formats[i],
1128                                      depth_bits,
1129                                      stencil_bits,
1130                                      num_depth_stencil_bits,
1131                                      back_buffer_modes, 2,
1132                                      singlesample_samples, 1,
1133                                      false);
1134       configs = driConcatConfigs(configs, new_configs);
1135    }
1136
1137    /* Generate the minimum possible set of configs that include an
1138     * accumulation buffer.
1139     */
1140    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1141       __DRIconfig **new_configs;
1142
1143       if (formats[i] == MESA_FORMAT_RGB565) {
1144          depth_bits[0] = 16;
1145          stencil_bits[0] = 0;
1146       } else {
1147          depth_bits[0] = 24;
1148          stencil_bits[0] = 8;
1149       }
1150
1151       new_configs = driCreateConfigs(formats[i],
1152                                      depth_bits, stencil_bits, 1,
1153                                      back_buffer_modes, 1,
1154                                      singlesample_samples, 1,
1155                                      true);
1156       configs = driConcatConfigs(configs, new_configs);
1157    }
1158
1159    /* Generate multisample configs.
1160     *
1161     * This loop breaks early, and hence is a no-op, on gen < 6.
1162     *
1163     * Multisample configs must follow the singlesample configs in order to
1164     * work around an X server bug present in 1.12. The X server chooses to
1165     * associate the first listed RGBA888-Z24S8 config, regardless of its
1166     * sample count, with the 32-bit depth visual used for compositing.
1167     *
1168     * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1169     * supported.  Singlebuffer configs are not supported because no one wants
1170     * them.
1171     */
1172    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1173       if (screen->gen < 6)
1174          break;
1175
1176       __DRIconfig **new_configs;
1177       const int num_depth_stencil_bits = 2;
1178       int num_msaa_modes = 0;
1179
1180       depth_bits[0] = 0;
1181       stencil_bits[0] = 0;
1182
1183       if (formats[i] == MESA_FORMAT_RGB565) {
1184          depth_bits[1] = 16;
1185          stencil_bits[1] = 0;
1186       } else {
1187          depth_bits[1] = 24;
1188          stencil_bits[1] = 8;
1189       }
1190
1191       if (screen->gen >= 7)
1192          num_msaa_modes = 2;
1193       else if (screen->gen == 6)
1194          num_msaa_modes = 1;
1195
1196       new_configs = driCreateConfigs(formats[i],
1197                                      depth_bits,
1198                                      stencil_bits,
1199                                      num_depth_stencil_bits,
1200                                      back_buffer_modes, 1,
1201                                      multisample_samples,
1202                                      num_msaa_modes,
1203                                      false);
1204       configs = driConcatConfigs(configs, new_configs);
1205    }
1206
1207    if (configs == NULL) {
1208       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1209               __LINE__);
1210       return NULL;
1211    }
1212
1213    return configs;
1214 }
1215
1216 static void
1217 set_max_gl_versions(struct intel_screen *screen)
1218 {
1219    int gl_version_override = _mesa_get_gl_version_override();
1220
1221    switch (screen->gen) {
1222    case 7:
1223       screen->max_gl_core_version = 31;
1224       screen->max_gl_compat_version = 30;
1225       screen->max_gl_es1_version = 11;
1226       screen->max_gl_es2_version = 30;
1227       break;
1228    case 6:
1229       screen->max_gl_core_version = 31;
1230       screen->max_gl_compat_version = 30;
1231       screen->max_gl_es1_version = 11;
1232       screen->max_gl_es2_version = 30;
1233       break;
1234    case 5:
1235    case 4:
1236       screen->max_gl_core_version = 0;
1237       screen->max_gl_compat_version = 21;
1238       screen->max_gl_es1_version = 11;
1239       screen->max_gl_es2_version = 20;
1240       break;
1241    default:
1242       assert(!"unrecognized intel_screen::gen");
1243       break;
1244    }
1245
1246    if (gl_version_override >= 31) {
1247       screen->max_gl_core_version = MAX2(screen->max_gl_core_version,
1248                                          gl_version_override);
1249    } else {
1250       screen->max_gl_compat_version = MAX2(screen->max_gl_compat_version,
1251                                            gl_version_override);
1252    }
1253
1254 #ifndef FEATURE_ES1
1255    screen->max_gl_es1_version = 0;
1256 #endif
1257
1258 #ifndef FEATURE_ES2
1259    screen->max_gl_es2_version = 0;
1260 #endif
1261 }
1262
1263 /**
1264  * This is the driver specific part of the createNewScreen entry point.
1265  * Called when using DRI2.
1266  *
1267  * \return the struct gl_config supported by this driver
1268  */
1269 static const
1270 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1271 {
1272    struct intel_screen *intelScreen;
1273
1274    if (psp->dri2.loader->base.version <= 2 ||
1275        psp->dri2.loader->getBuffersWithFormat == NULL) {
1276       fprintf(stderr,
1277               "\nERROR!  DRI2 loader with getBuffersWithFormat() "
1278               "support required\n");
1279       return false;
1280    }
1281
1282    /* Allocate the private area */
1283    intelScreen = calloc(1, sizeof *intelScreen);
1284    if (!intelScreen) {
1285       fprintf(stderr, "\nERROR!  Allocating private area failed\n");
1286       return false;
1287    }
1288    /* parse information in __driConfigOptions */
1289    driParseOptionInfo(&intelScreen->optionCache, __driConfigOptions);
1290
1291    intelScreen->driScrnPriv = psp;
1292    psp->driverPrivate = (void *) intelScreen;
1293
1294    if (!intel_init_bufmgr(intelScreen))
1295        return false;
1296
1297    intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1298
1299    if (IS_GEN7(intelScreen->deviceID)) {
1300       intelScreen->gen = 7;
1301    } else if (IS_GEN6(intelScreen->deviceID)) {
1302       intelScreen->gen = 6;
1303    } else if (IS_GEN5(intelScreen->deviceID)) {
1304       intelScreen->gen = 5;
1305    } else {
1306       intelScreen->gen = 4;
1307    }
1308
1309    intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1310    intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1311
1312    int has_llc = 0;
1313    bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1314                                   &has_llc);
1315    if (success && has_llc)
1316       intelScreen->hw_has_llc = true;
1317    else if (!success && intelScreen->gen >= 6)
1318       intelScreen->hw_has_llc = true;
1319
1320    intel_override_separate_stencil(intelScreen);
1321
1322    intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1323
1324    set_max_gl_versions(intelScreen);
1325
1326    psp->api_mask = (1 << __DRI_API_OPENGL);
1327    if (intelScreen->max_gl_core_version > 0)
1328       psp->api_mask |= (1 << __DRI_API_OPENGL_CORE);
1329    if (intelScreen->max_gl_es1_version > 0)
1330       psp->api_mask |= (1 << __DRI_API_GLES);
1331    if (intelScreen->max_gl_es2_version > 0)
1332       psp->api_mask |= (1 << __DRI_API_GLES2);
1333    if (intelScreen->max_gl_es2_version >= 30)
1334       psp->api_mask |= (1 << __DRI_API_GLES3);
1335
1336    psp->extensions = intelScreenExtensions;
1337
1338    return (const __DRIconfig**) intel_screen_make_configs(psp);
1339 }
1340
1341 struct intel_buffer {
1342    __DRIbuffer base;
1343    struct intel_region *region;
1344 };
1345
1346 static __DRIbuffer *
1347 intelAllocateBuffer(__DRIscreen *screen,
1348                     unsigned attachment, unsigned format,
1349                     int width, int height)
1350 {
1351    struct intel_buffer *intelBuffer;
1352    struct intel_screen *intelScreen = screen->driverPrivate;
1353
1354    assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1355           attachment == __DRI_BUFFER_BACK_LEFT);
1356
1357    intelBuffer = calloc(1, sizeof *intelBuffer);
1358    if (intelBuffer == NULL)
1359       return NULL;
1360
1361    /* The front and back buffers are color buffers, which are X tiled. */
1362    intelBuffer->region = intel_region_alloc(intelScreen,
1363                                             I915_TILING_X,
1364                                             format / 8,
1365                                             width,
1366                                             height,
1367                                             true);
1368
1369    if (intelBuffer->region == NULL) {
1370            free(intelBuffer);
1371            return NULL;
1372    }
1373
1374    intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1375
1376    intelBuffer->base.attachment = attachment;
1377    intelBuffer->base.cpp = intelBuffer->region->cpp;
1378    intelBuffer->base.pitch = intelBuffer->region->pitch;
1379
1380    return &intelBuffer->base;
1381 }
1382
1383 static void
1384 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1385 {
1386    struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1387
1388    intel_region_release(&intelBuffer->region);
1389    free(intelBuffer);
1390 }
1391
1392
1393 const struct __DriverAPIRec driDriverAPI = {
1394    .InitScreen           = intelInitScreen2,
1395    .DestroyScreen        = intelDestroyScreen,
1396    .CreateContext        = intelCreateContext,
1397    .DestroyContext       = intelDestroyContext,
1398    .CreateBuffer         = intelCreateBuffer,
1399    .DestroyBuffer        = intelDestroyBuffer,
1400    .MakeCurrent          = intelMakeCurrent,
1401    .UnbindContext        = intelUnbindContext,
1402    .AllocateBuffer       = intelAllocateBuffer,
1403    .ReleaseBuffer        = intelReleaseBuffer
1404 };
1405
1406 /* This is the table of extensions that the loader will dlsym() for. */
1407 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1408     &driCoreExtension.base,
1409     &driDRI2Extension.base,
1410     NULL
1411 };