1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
43 PUBLIC
const char __driConfigOptions
[] =
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
50 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
57 DRI_CONF_OPT_BEGIN_B(hiz
, "true")
58 DRI_CONF_DESC(en
, "Enable Hierarchical Z on gen6+")
61 DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization
, "false")
62 DRI_CONF_DESC(en
, "Derivatives with finer granularity by default")
66 DRI_CONF_SECTION_QUALITY
67 DRI_CONF_FORCE_S3TC_ENABLE("false")
69 DRI_CONF_SECTION_DEBUG
70 DRI_CONF_NO_RAST("false")
71 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
72 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
73 DRI_CONF_DISABLE_THROTTLING("false")
74 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
75 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
76 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
78 DRI_CONF_OPT_BEGIN_B(shader_precompile
, "true")
79 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
84 #include "intel_batchbuffer.h"
85 #include "intel_buffers.h"
86 #include "intel_bufmgr.h"
87 #include "intel_chipset.h"
88 #include "intel_fbo.h"
89 #include "intel_mipmap_tree.h"
90 #include "intel_screen.h"
91 #include "intel_tex.h"
92 #include "intel_regions.h"
94 #include "brw_context.h"
98 #ifdef USE_NEW_INTERFACE
99 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
100 #endif /*USE_NEW_INTERFACE */
103 * For debugging purposes, this returns a time in seconds.
110 clock_gettime(CLOCK_MONOTONIC
, &tp
);
112 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
116 aub_dump_bmp(struct gl_context
*ctx
)
118 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
120 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
121 struct intel_renderbuffer
*irb
=
122 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
124 if (irb
&& irb
->mt
) {
125 enum aub_dump_bmp_format format
;
127 switch (irb
->Base
.Base
.Format
) {
128 case MESA_FORMAT_ARGB8888
:
129 case MESA_FORMAT_XRGB8888
:
130 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
136 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
137 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
140 irb
->Base
.Base
.Width
,
141 irb
->Base
.Base
.Height
,
143 irb
->mt
->region
->pitch
,
149 static const __DRItexBufferExtension intelTexBufferExtension
= {
150 .base
= { __DRI_TEX_BUFFER
, __DRI_TEX_BUFFER_VERSION
},
152 .setTexBuffer
= intelSetTexBuffer
,
153 .setTexBuffer2
= intelSetTexBuffer2
,
154 .releaseTexBuffer
= NULL
,
158 intel_dri2_flush_with_flags(__DRIcontext
*cPriv
,
159 __DRIdrawable
*dPriv
,
161 enum __DRI2throttleReason reason
)
163 struct brw_context
*brw
= cPriv
->driverPrivate
;
168 struct gl_context
*ctx
= &brw
->ctx
;
170 FLUSH_VERTICES(ctx
, 0);
172 if (flags
& __DRI2_FLUSH_DRAWABLE
)
173 intel_resolve_for_dri2_flush(brw
, dPriv
);
175 if (reason
== __DRI2_THROTTLE_SWAPBUFFER
||
176 reason
== __DRI2_THROTTLE_FLUSHFRONT
) {
177 brw
->need_throttle
= true;
180 intel_batchbuffer_flush(brw
);
182 if (INTEL_DEBUG
& DEBUG_AUB
) {
188 * Provides compatibility with loaders that only support the older (version
189 * 1-3) flush interface.
191 * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
194 intel_dri2_flush(__DRIdrawable
*drawable
)
196 intel_dri2_flush_with_flags(drawable
->driContextPriv
, drawable
,
197 __DRI2_FLUSH_DRAWABLE
,
198 __DRI2_THROTTLE_SWAPBUFFER
);
201 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
202 .base
= { __DRI2_FLUSH
, 4 },
204 .flush
= intel_dri2_flush
,
205 .invalidate
= dri2InvalidateDrawable
,
206 .flush_with_flags
= intel_dri2_flush_with_flags
,
209 static struct intel_image_format intel_image_formats
[] = {
210 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
213 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
214 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
216 { __DRI_IMAGE_FOURCC_RGB565
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
217 { { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565
, 2 } } },
219 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
220 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
221 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
222 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
224 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
225 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
226 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
227 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
229 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
230 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
231 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
232 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
234 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
235 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
236 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
237 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
239 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
240 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
241 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
242 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
244 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
245 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
246 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
248 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
249 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
250 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
252 /* For YUYV buffers, we set up two overlapping DRI images and treat
253 * them as planar buffers in the compositors. Plane 0 is GR88 and
254 * samples YU or YV pairs and places Y into the R component, while
255 * plane 1 is ARGB and samples YUYV clusters and places pairs and
256 * places U into the G component and V into A. This lets the
257 * texture sampler interpolate the Y components correctly when
258 * sampling from plane 0, and interpolate U and V correctly when
259 * sampling from plane 1. */
260 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
261 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
262 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } }
265 static struct intel_image_format
*
266 intel_image_format_lookup(int fourcc
)
268 struct intel_image_format
*f
= NULL
;
270 for (unsigned i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
271 if (intel_image_formats
[i
].fourcc
== fourcc
) {
272 f
= &intel_image_formats
[i
];
281 intel_allocate_image(int dri_format
, void *loaderPrivate
)
285 image
= calloc(1, sizeof *image
);
289 image
->dri_format
= dri_format
;
292 switch (dri_format
) {
293 case __DRI_IMAGE_FORMAT_RGB565
:
294 image
->format
= MESA_FORMAT_RGB565
;
296 case __DRI_IMAGE_FORMAT_XRGB8888
:
297 image
->format
= MESA_FORMAT_XRGB8888
;
299 case __DRI_IMAGE_FORMAT_ARGB2101010
:
300 image
->format
= MESA_FORMAT_ARGB2101010
;
302 case __DRI_IMAGE_FORMAT_XRGB2101010
:
303 image
->format
= MESA_FORMAT_XRGB2101010_UNORM
;
305 case __DRI_IMAGE_FORMAT_ARGB8888
:
306 image
->format
= MESA_FORMAT_ARGB8888
;
308 case __DRI_IMAGE_FORMAT_ABGR8888
:
309 image
->format
= MESA_FORMAT_RGBA8888_REV
;
311 case __DRI_IMAGE_FORMAT_XBGR8888
:
312 image
->format
= MESA_FORMAT_RGBX8888_REV
;
314 case __DRI_IMAGE_FORMAT_R8
:
315 image
->format
= MESA_FORMAT_R8
;
317 case __DRI_IMAGE_FORMAT_GR88
:
318 image
->format
= MESA_FORMAT_GR88
;
320 case __DRI_IMAGE_FORMAT_NONE
:
321 image
->format
= MESA_FORMAT_NONE
;
328 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
329 image
->data
= loaderPrivate
;
335 * Sets up a DRIImage structure to point to our shared image in a region
338 intel_setup_image_from_mipmap_tree(struct brw_context
*brw
, __DRIimage
*image
,
339 struct intel_mipmap_tree
*mt
, GLuint level
,
342 unsigned int draw_x
, draw_y
;
343 uint32_t mask_x
, mask_y
;
345 intel_miptree_make_shareable(brw
, mt
);
347 intel_miptree_check_level_layer(mt
, level
, zoffset
);
349 intel_region_get_tile_masks(mt
->region
, &mask_x
, &mask_y
, false);
350 intel_miptree_get_image_offset(mt
, level
, zoffset
, &draw_x
, &draw_y
);
352 image
->width
= mt
->level
[level
].width
;
353 image
->height
= mt
->level
[level
].height
;
354 image
->tile_x
= draw_x
& mask_x
;
355 image
->tile_y
= draw_y
& mask_y
;
357 image
->offset
= intel_region_get_aligned_offset(mt
->region
,
362 intel_region_reference(&image
->region
, mt
->region
);
366 intel_setup_image_from_dimensions(__DRIimage
*image
)
368 image
->width
= image
->region
->width
;
369 image
->height
= image
->region
->height
;
372 image
->has_depthstencil
= false;
375 static inline uint32_t
376 intel_dri_format(GLuint format
)
379 case MESA_FORMAT_RGB565
:
380 return __DRI_IMAGE_FORMAT_RGB565
;
381 case MESA_FORMAT_XRGB8888
:
382 return __DRI_IMAGE_FORMAT_XRGB8888
;
383 case MESA_FORMAT_ARGB8888
:
384 return __DRI_IMAGE_FORMAT_ARGB8888
;
385 case MESA_FORMAT_RGBA8888_REV
:
386 return __DRI_IMAGE_FORMAT_ABGR8888
;
388 return __DRI_IMAGE_FORMAT_R8
;
389 case MESA_FORMAT_RG88
:
390 return __DRI_IMAGE_FORMAT_GR88
;
391 case MESA_FORMAT_XRGB2101010_UNORM
:
392 return __DRI_IMAGE_FORMAT_XRGB2101010
;
393 case MESA_FORMAT_ARGB2101010
:
394 return __DRI_IMAGE_FORMAT_ARGB2101010
;
397 return MESA_FORMAT_NONE
;
401 intel_create_image_from_name(__DRIscreen
*screen
,
402 int width
, int height
, int format
,
403 int name
, int pitch
, void *loaderPrivate
)
405 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
409 image
= intel_allocate_image(format
, loaderPrivate
);
413 if (image
->format
== MESA_FORMAT_NONE
)
416 cpp
= _mesa_get_format_bytes(image
->format
);
417 image
->region
= intel_region_alloc_for_handle(intelScreen
,
419 pitch
* cpp
, name
, "image");
420 if (image
->region
== NULL
) {
425 intel_setup_image_from_dimensions(image
);
431 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
432 int renderbuffer
, void *loaderPrivate
)
435 struct brw_context
*brw
= context
->driverPrivate
;
436 struct gl_context
*ctx
= &brw
->ctx
;
437 struct gl_renderbuffer
*rb
;
438 struct intel_renderbuffer
*irb
;
440 rb
= _mesa_lookup_renderbuffer(ctx
, renderbuffer
);
442 _mesa_error(ctx
, GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
446 irb
= intel_renderbuffer(rb
);
447 intel_miptree_make_shareable(brw
, irb
->mt
);
448 image
= calloc(1, sizeof *image
);
452 image
->internal_format
= rb
->InternalFormat
;
453 image
->format
= rb
->Format
;
455 image
->data
= loaderPrivate
;
456 intel_region_reference(&image
->region
, irb
->mt
->region
);
457 intel_setup_image_from_dimensions(image
);
458 image
->dri_format
= intel_dri_format(image
->format
);
459 image
->has_depthstencil
= irb
->mt
->stencil_mt
? true : false;
461 rb
->NeedsFinishRenderTexture
= true;
466 intel_create_image_from_texture(__DRIcontext
*context
, int target
,
467 unsigned texture
, int zoffset
,
473 struct brw_context
*brw
= context
->driverPrivate
;
474 struct gl_texture_object
*obj
;
475 struct intel_texture_object
*iobj
;
478 obj
= _mesa_lookup_texture(&brw
->ctx
, texture
);
479 if (!obj
|| obj
->Target
!= target
) {
480 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
484 if (target
== GL_TEXTURE_CUBE_MAP
)
487 _mesa_test_texobj_completeness(&brw
->ctx
, obj
);
488 iobj
= intel_texture_object(obj
);
489 if (!obj
->_BaseComplete
|| (level
> 0 && !obj
->_MipmapComplete
)) {
490 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
494 if (level
< obj
->BaseLevel
|| level
> obj
->_MaxLevel
) {
495 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
499 if (target
== GL_TEXTURE_3D
&& obj
->Image
[face
][level
]->Depth
< zoffset
) {
500 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
503 image
= calloc(1, sizeof *image
);
505 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
509 image
->internal_format
= obj
->Image
[face
][level
]->InternalFormat
;
510 image
->format
= obj
->Image
[face
][level
]->TexFormat
;
511 image
->data
= loaderPrivate
;
512 intel_setup_image_from_mipmap_tree(brw
, image
, iobj
->mt
, level
, zoffset
);
513 image
->dri_format
= intel_dri_format(image
->format
);
514 image
->has_depthstencil
= iobj
->mt
->stencil_mt
? true : false;
515 if (image
->dri_format
== MESA_FORMAT_NONE
) {
516 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
521 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
526 intel_destroy_image(__DRIimage
*image
)
528 intel_region_release(&image
->region
);
533 intel_create_image(__DRIscreen
*screen
,
534 int width
, int height
, int format
,
539 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
543 tiling
= I915_TILING_X
;
544 if (use
& __DRI_IMAGE_USE_CURSOR
) {
545 if (width
!= 64 || height
!= 64)
547 tiling
= I915_TILING_NONE
;
550 if (use
& __DRI_IMAGE_USE_LINEAR
)
551 tiling
= I915_TILING_NONE
;
553 image
= intel_allocate_image(format
, loaderPrivate
);
557 cpp
= _mesa_get_format_bytes(image
->format
);
559 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
560 if (image
->region
== NULL
) {
565 intel_setup_image_from_dimensions(image
);
571 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
574 case __DRI_IMAGE_ATTRIB_STRIDE
:
575 *value
= image
->region
->pitch
;
577 case __DRI_IMAGE_ATTRIB_HANDLE
:
578 *value
= image
->region
->bo
->handle
;
580 case __DRI_IMAGE_ATTRIB_NAME
:
581 return intel_region_flink(image
->region
, (uint32_t *) value
);
582 case __DRI_IMAGE_ATTRIB_FORMAT
:
583 *value
= image
->dri_format
;
585 case __DRI_IMAGE_ATTRIB_WIDTH
:
586 *value
= image
->region
->width
;
588 case __DRI_IMAGE_ATTRIB_HEIGHT
:
589 *value
= image
->region
->height
;
591 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
592 if (image
->planar_format
== NULL
)
594 *value
= image
->planar_format
->components
;
596 case __DRI_IMAGE_ATTRIB_FD
:
597 if (drm_intel_bo_gem_export_to_prime(image
->region
->bo
, value
) == 0)
606 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
610 image
= calloc(1, sizeof *image
);
614 intel_region_reference(&image
->region
, orig_image
->region
);
615 if (image
->region
== NULL
) {
620 image
->internal_format
= orig_image
->internal_format
;
621 image
->planar_format
= orig_image
->planar_format
;
622 image
->dri_format
= orig_image
->dri_format
;
623 image
->format
= orig_image
->format
;
624 image
->offset
= orig_image
->offset
;
625 image
->width
= orig_image
->width
;
626 image
->height
= orig_image
->height
;
627 image
->tile_x
= orig_image
->tile_x
;
628 image
->tile_y
= orig_image
->tile_y
;
629 image
->has_depthstencil
= orig_image
->has_depthstencil
;
630 image
->data
= loaderPrivate
;
632 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
633 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
639 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
641 if (use
& __DRI_IMAGE_USE_CURSOR
) {
642 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
650 intel_create_image_from_names(__DRIscreen
*screen
,
651 int width
, int height
, int fourcc
,
652 int *names
, int num_names
,
653 int *strides
, int *offsets
,
656 struct intel_image_format
*f
= NULL
;
660 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
663 f
= intel_image_format_lookup(fourcc
);
667 image
= intel_create_image_from_name(screen
, width
, height
,
668 __DRI_IMAGE_FORMAT_NONE
,
669 names
[0], strides
[0],
675 image
->planar_format
= f
;
676 for (i
= 0; i
< f
->nplanes
; i
++) {
677 index
= f
->planes
[i
].buffer_index
;
678 image
->offsets
[index
] = offsets
[index
];
679 image
->strides
[index
] = strides
[index
];
686 intel_create_image_from_fds(__DRIscreen
*screen
,
687 int width
, int height
, int fourcc
,
688 int *fds
, int num_fds
, int *strides
, int *offsets
,
691 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
692 struct intel_image_format
*f
;
696 if (fds
== NULL
|| num_fds
!= 1)
699 f
= intel_image_format_lookup(fourcc
);
704 image
= intel_allocate_image(f
->planes
[0].dri_format
, loaderPrivate
);
706 image
= intel_allocate_image(__DRI_IMAGE_FORMAT_NONE
, loaderPrivate
);
711 image
->region
= intel_region_alloc_for_fd(intelScreen
,
713 strides
[0], fds
[0], "image");
714 if (image
->region
== NULL
) {
719 image
->planar_format
= f
;
720 for (i
= 0; i
< f
->nplanes
; i
++) {
721 index
= f
->planes
[i
].buffer_index
;
722 image
->offsets
[index
] = offsets
[index
];
723 image
->strides
[index
] = strides
[index
];
726 intel_setup_image_from_dimensions(image
);
732 intel_create_image_from_dma_bufs(__DRIscreen
*screen
,
733 int width
, int height
, int fourcc
,
734 int *fds
, int num_fds
,
735 int *strides
, int *offsets
,
736 enum __DRIYUVColorSpace yuv_color_space
,
737 enum __DRISampleRange sample_range
,
738 enum __DRIChromaSiting horizontal_siting
,
739 enum __DRIChromaSiting vertical_siting
,
744 struct intel_image_format
*f
= intel_image_format_lookup(fourcc
);
746 /* For now only packed formats that have native sampling are supported. */
747 if (!f
|| f
->nplanes
!= 1) {
748 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
752 image
= intel_create_image_from_fds(screen
, width
, height
, fourcc
, fds
,
753 num_fds
, strides
, offsets
,
757 * Invalid parameters and any inconsistencies between are assumed to be
758 * checked by the caller. Therefore besides unsupported formats one can fail
759 * only in allocation.
762 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
766 image
->dma_buf_imported
= true;
767 image
->yuv_color_space
= yuv_color_space
;
768 image
->sample_range
= sample_range
;
769 image
->horizontal_siting
= horizontal_siting
;
770 image
->vertical_siting
= vertical_siting
;
772 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
777 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
779 int width
, height
, offset
, stride
, dri_format
, index
;
780 struct intel_image_format
*f
;
781 uint32_t mask_x
, mask_y
;
784 if (parent
== NULL
|| parent
->planar_format
== NULL
)
787 f
= parent
->planar_format
;
789 if (plane
>= f
->nplanes
)
792 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
793 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
794 dri_format
= f
->planes
[plane
].dri_format
;
795 index
= f
->planes
[plane
].buffer_index
;
796 offset
= parent
->offsets
[index
];
797 stride
= parent
->strides
[index
];
799 image
= intel_allocate_image(dri_format
, loaderPrivate
);
803 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
804 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
809 image
->region
= calloc(sizeof(*image
->region
), 1);
810 if (image
->region
== NULL
) {
815 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
816 image
->region
->width
= width
;
817 image
->region
->height
= height
;
818 image
->region
->pitch
= stride
;
819 image
->region
->refcount
= 1;
820 image
->region
->bo
= parent
->region
->bo
;
821 drm_intel_bo_reference(image
->region
->bo
);
822 image
->region
->tiling
= parent
->region
->tiling
;
823 image
->offset
= offset
;
824 intel_setup_image_from_dimensions(image
);
826 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
, false);
829 "intel_create_sub_image: offset not on tile boundary");
834 static struct __DRIimageExtensionRec intelImageExtension
= {
835 .base
= { __DRI_IMAGE
, 8 },
837 .createImageFromName
= intel_create_image_from_name
,
838 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
839 .destroyImage
= intel_destroy_image
,
840 .createImage
= intel_create_image
,
841 .queryImage
= intel_query_image
,
842 .dupImage
= intel_dup_image
,
843 .validateUsage
= intel_validate_usage
,
844 .createImageFromNames
= intel_create_image_from_names
,
845 .fromPlanar
= intel_from_planar
,
846 .createImageFromTexture
= intel_create_image_from_texture
,
847 .createImageFromFds
= intel_create_image_from_fds
,
848 .createImageFromDmaBufs
= intel_create_image_from_dma_bufs
851 static const __DRIextension
*intelScreenExtensions
[] = {
852 &intelTexBufferExtension
.base
,
853 &intelFlushExtension
.base
,
854 &intelImageExtension
.base
,
855 &dri2ConfigQueryExtension
.base
,
860 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
863 struct drm_i915_getparam gp
;
865 memset(&gp
, 0, sizeof(gp
));
869 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
872 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
880 intel_get_boolean(__DRIscreen
*psp
, int param
)
883 return intel_get_param(psp
, param
, &value
) && value
;
887 intelDestroyScreen(__DRIscreen
* sPriv
)
889 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
891 dri_bufmgr_destroy(intelScreen
->bufmgr
);
892 driDestroyOptionInfo(&intelScreen
->optionCache
);
895 sPriv
->driverPrivate
= NULL
;
900 * This is called when we need to set up GL rendering to a new X window.
903 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
904 __DRIdrawable
* driDrawPriv
,
905 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
907 struct intel_renderbuffer
*rb
;
908 struct intel_screen
*screen
= (struct intel_screen
*) driScrnPriv
->driverPrivate
;
910 unsigned num_samples
= intel_quantize_num_samples(screen
, mesaVis
->samples
);
911 struct gl_framebuffer
*fb
;
916 fb
= CALLOC_STRUCT(gl_framebuffer
);
920 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
922 if (mesaVis
->redBits
== 5)
923 rgbFormat
= MESA_FORMAT_RGB565
;
924 else if (mesaVis
->redBits
== 10)
925 rgbFormat
= MESA_FORMAT_ARGB2101010
;
926 else if (mesaVis
->sRGBCapable
)
927 rgbFormat
= MESA_FORMAT_SARGB8
;
928 else if (mesaVis
->alphaBits
== 0)
929 rgbFormat
= MESA_FORMAT_XRGB8888
;
931 rgbFormat
= MESA_FORMAT_SARGB8
;
932 fb
->Visual
.sRGBCapable
= true;
935 /* setup the hardware-based renderbuffers */
936 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
937 _mesa_add_renderbuffer(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
939 if (mesaVis
->doubleBufferMode
) {
940 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
941 _mesa_add_renderbuffer(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
945 * Assert here that the gl_config has an expected depth/stencil bit
946 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
947 * which constructs the advertised configs.)
949 if (mesaVis
->depthBits
== 24) {
950 assert(mesaVis
->stencilBits
== 8);
952 if (screen
->devinfo
->has_hiz_and_separate_stencil
) {
953 rb
= intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24
,
955 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
956 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8
,
958 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
961 * Use combined depth/stencil. Note that the renderbuffer is
962 * attached to two attachment points.
964 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24
,
966 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
967 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
970 else if (mesaVis
->depthBits
== 16) {
971 assert(mesaVis
->stencilBits
== 0);
972 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z16
,
974 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
977 assert(mesaVis
->depthBits
== 0);
978 assert(mesaVis
->stencilBits
== 0);
981 /* now add any/all software-based renderbuffers we may need */
982 _swrast_add_soft_renderbuffers(fb
,
983 false, /* never sw color */
984 false, /* never sw depth */
985 false, /* never sw stencil */
986 mesaVis
->accumRedBits
> 0,
987 false, /* never sw alpha */
988 false /* never sw aux */ );
989 driDrawPriv
->driverPrivate
= fb
;
995 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
997 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
999 _mesa_reference_framebuffer(&fb
, NULL
);
1003 intel_init_bufmgr(struct intel_screen
*intelScreen
)
1005 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
1007 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
1009 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
1010 if (intelScreen
->bufmgr
== NULL
) {
1011 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
1012 __func__
, __LINE__
);
1016 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
1018 if (!intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
)) {
1019 fprintf(stderr
, "[%s: %u] Kernel 2.6.39 required.\n", __func__
, __LINE__
);
1027 intel_detect_swizzling(struct intel_screen
*screen
)
1029 drm_intel_bo
*buffer
;
1030 unsigned long flags
= 0;
1031 unsigned long aligned_pitch
;
1032 uint32_t tiling
= I915_TILING_X
;
1033 uint32_t swizzle_mode
= 0;
1035 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
1037 &tiling
, &aligned_pitch
, flags
);
1041 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
1042 drm_intel_bo_unreference(buffer
);
1044 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
1050 static __DRIconfig
**
1051 intel_screen_make_configs(__DRIscreen
*dri_screen
)
1053 static const gl_format formats
[] = {
1055 MESA_FORMAT_ARGB8888
,
1056 MESA_FORMAT_ARGB2101010
1059 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1060 static const GLenum back_buffer_modes
[] = {
1061 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
1064 static const uint8_t singlesample_samples
[1] = {0};
1065 static const uint8_t multisample_samples
[2] = {4, 8};
1067 struct intel_screen
*screen
= dri_screen
->driverPrivate
;
1068 const struct brw_device_info
*devinfo
= screen
->devinfo
;
1069 uint8_t depth_bits
[4], stencil_bits
[4];
1070 __DRIconfig
**configs
= NULL
;
1072 /* Generate singlesample configs without accumulation buffer. */
1073 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1074 __DRIconfig
**new_configs
;
1075 int num_depth_stencil_bits
= 2;
1077 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1078 * buffer that has a different number of bits per pixel than the color
1079 * buffer, gen >= 6 supports this.
1082 stencil_bits
[0] = 0;
1084 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1086 stencil_bits
[1] = 0;
1087 if (devinfo
->gen
>= 6) {
1089 stencil_bits
[2] = 8;
1090 num_depth_stencil_bits
= 3;
1094 stencil_bits
[1] = 8;
1097 new_configs
= driCreateConfigs(formats
[i
],
1100 num_depth_stencil_bits
,
1101 back_buffer_modes
, 2,
1102 singlesample_samples
, 1,
1104 configs
= driConcatConfigs(configs
, new_configs
);
1107 /* Generate the minimum possible set of configs that include an
1108 * accumulation buffer.
1110 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1111 __DRIconfig
**new_configs
;
1113 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1115 stencil_bits
[0] = 0;
1118 stencil_bits
[0] = 8;
1121 new_configs
= driCreateConfigs(formats
[i
],
1122 depth_bits
, stencil_bits
, 1,
1123 back_buffer_modes
, 1,
1124 singlesample_samples
, 1,
1126 configs
= driConcatConfigs(configs
, new_configs
);
1129 /* Generate multisample configs.
1131 * This loop breaks early, and hence is a no-op, on gen < 6.
1133 * Multisample configs must follow the singlesample configs in order to
1134 * work around an X server bug present in 1.12. The X server chooses to
1135 * associate the first listed RGBA888-Z24S8 config, regardless of its
1136 * sample count, with the 32-bit depth visual used for compositing.
1138 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1139 * supported. Singlebuffer configs are not supported because no one wants
1142 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1143 if (devinfo
->gen
< 6)
1146 __DRIconfig
**new_configs
;
1147 const int num_depth_stencil_bits
= 2;
1148 int num_msaa_modes
= 0;
1151 stencil_bits
[0] = 0;
1153 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1155 stencil_bits
[1] = 0;
1158 stencil_bits
[1] = 8;
1161 if (devinfo
->gen
>= 7)
1163 else if (devinfo
->gen
== 6)
1166 new_configs
= driCreateConfigs(formats
[i
],
1169 num_depth_stencil_bits
,
1170 back_buffer_modes
, 1,
1171 multisample_samples
,
1174 configs
= driConcatConfigs(configs
, new_configs
);
1177 if (configs
== NULL
) {
1178 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1187 set_max_gl_versions(struct intel_screen
*screen
)
1189 __DRIscreen
*psp
= screen
->driScrnPriv
;
1191 switch (screen
->devinfo
->gen
) {
1193 psp
->max_gl_core_version
= 32;
1194 psp
->max_gl_compat_version
= 30;
1195 psp
->max_gl_es1_version
= 11;
1196 psp
->max_gl_es2_version
= 30;
1199 psp
->max_gl_core_version
= 31;
1200 psp
->max_gl_compat_version
= 30;
1201 psp
->max_gl_es1_version
= 11;
1202 psp
->max_gl_es2_version
= 30;
1206 psp
->max_gl_core_version
= 0;
1207 psp
->max_gl_compat_version
= 21;
1208 psp
->max_gl_es1_version
= 11;
1209 psp
->max_gl_es2_version
= 20;
1212 assert(!"unrecognized intel_screen::gen");
1218 * This is the driver specific part of the createNewScreen entry point.
1219 * Called when using DRI2.
1221 * \return the struct gl_config supported by this driver
1224 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1226 struct intel_screen
*intelScreen
;
1228 if (psp
->dri2
.loader
->base
.version
<= 2 ||
1229 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1231 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1232 "support required\n");
1236 /* Allocate the private area */
1237 intelScreen
= calloc(1, sizeof *intelScreen
);
1239 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1242 /* parse information in __driConfigOptions */
1243 driParseOptionInfo(&intelScreen
->optionCache
, __driConfigOptions
);
1245 intelScreen
->driScrnPriv
= psp
;
1246 psp
->driverPrivate
= (void *) intelScreen
;
1248 if (!intel_init_bufmgr(intelScreen
))
1251 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1252 intelScreen
->devinfo
= brw_get_device_info(intelScreen
->deviceID
);
1254 intelScreen
->hw_must_use_separate_stencil
= intelScreen
->devinfo
->gen
>= 7;
1256 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1258 set_max_gl_versions(intelScreen
);
1260 psp
->extensions
= intelScreenExtensions
;
1262 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1265 struct intel_buffer
{
1267 struct intel_region
*region
;
1270 static __DRIbuffer
*
1271 intelAllocateBuffer(__DRIscreen
*screen
,
1272 unsigned attachment
, unsigned format
,
1273 int width
, int height
)
1275 struct intel_buffer
*intelBuffer
;
1276 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1278 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1279 attachment
== __DRI_BUFFER_BACK_LEFT
);
1281 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1282 if (intelBuffer
== NULL
)
1285 /* The front and back buffers are color buffers, which are X tiled. */
1286 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1293 if (intelBuffer
->region
== NULL
) {
1298 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1300 intelBuffer
->base
.attachment
= attachment
;
1301 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1302 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1304 return &intelBuffer
->base
;
1308 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1310 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1312 intel_region_release(&intelBuffer
->region
);
1317 const struct __DriverAPIRec driDriverAPI
= {
1318 .InitScreen
= intelInitScreen2
,
1319 .DestroyScreen
= intelDestroyScreen
,
1320 .CreateContext
= brwCreateContext
,
1321 .DestroyContext
= intelDestroyContext
,
1322 .CreateBuffer
= intelCreateBuffer
,
1323 .DestroyBuffer
= intelDestroyBuffer
,
1324 .MakeCurrent
= intelMakeCurrent
,
1325 .UnbindContext
= intelUnbindContext
,
1326 .AllocateBuffer
= intelAllocateBuffer
,
1327 .ReleaseBuffer
= intelReleaseBuffer
1330 /* This is the table of extensions that the loader will dlsym() for. */
1331 PUBLIC
const __DRIextension
*__driDriverExtensions
[] = {
1332 &driCoreExtension
.base
,
1333 &driDRI2Extension
.base
,