1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
43 PUBLIC
const char __driConfigOptions
[] =
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
50 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
57 DRI_CONF_OPT_BEGIN_B(hiz
, "true")
58 DRI_CONF_DESC(en
, "Enable Hierarchical Z on gen6+")
61 DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization
, "false")
62 DRI_CONF_DESC(en
, "Derivatives with finer granularity by default")
66 DRI_CONF_SECTION_QUALITY
67 DRI_CONF_FORCE_S3TC_ENABLE("false")
69 DRI_CONF_SECTION_DEBUG
70 DRI_CONF_NO_RAST("false")
71 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
72 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
73 DRI_CONF_DISABLE_THROTTLING("false")
74 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
75 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
76 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
78 DRI_CONF_OPT_BEGIN_B(shader_precompile
, "true")
79 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
84 #include "intel_batchbuffer.h"
85 #include "intel_buffers.h"
86 #include "intel_bufmgr.h"
87 #include "intel_chipset.h"
88 #include "intel_fbo.h"
89 #include "intel_mipmap_tree.h"
90 #include "intel_screen.h"
91 #include "intel_tex.h"
92 #include "intel_regions.h"
94 #include "brw_context.h"
98 #ifdef USE_NEW_INTERFACE
99 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
100 #endif /*USE_NEW_INTERFACE */
103 * For debugging purposes, this returns a time in seconds.
110 clock_gettime(CLOCK_MONOTONIC
, &tp
);
112 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
116 aub_dump_bmp(struct gl_context
*ctx
)
118 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
120 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
121 struct intel_renderbuffer
*irb
=
122 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
124 if (irb
&& irb
->mt
) {
125 enum aub_dump_bmp_format format
;
127 switch (irb
->Base
.Base
.Format
) {
128 case MESA_FORMAT_ARGB8888
:
129 case MESA_FORMAT_XRGB8888
:
130 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
136 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
137 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
140 irb
->Base
.Base
.Width
,
141 irb
->Base
.Base
.Height
,
143 irb
->mt
->region
->pitch
,
149 static const __DRItexBufferExtension intelTexBufferExtension
= {
150 .base
= { __DRI_TEX_BUFFER
, __DRI_TEX_BUFFER_VERSION
},
152 .setTexBuffer
= intelSetTexBuffer
,
153 .setTexBuffer2
= intelSetTexBuffer2
,
154 .releaseTexBuffer
= NULL
,
158 intel_dri2_flush_with_flags(__DRIcontext
*cPriv
,
159 __DRIdrawable
*dPriv
,
161 enum __DRI2throttleReason reason
)
163 struct brw_context
*brw
= cPriv
->driverPrivate
;
168 struct gl_context
*ctx
= &brw
->ctx
;
170 FLUSH_VERTICES(ctx
, 0);
172 if (flags
& __DRI2_FLUSH_DRAWABLE
)
173 intel_resolve_for_dri2_flush(brw
, dPriv
);
175 if (reason
== __DRI2_THROTTLE_SWAPBUFFER
||
176 reason
== __DRI2_THROTTLE_FLUSHFRONT
) {
177 brw
->need_throttle
= true;
180 intel_batchbuffer_flush(brw
);
182 if (INTEL_DEBUG
& DEBUG_AUB
) {
188 * Provides compatibility with loaders that only support the older (version
189 * 1-3) flush interface.
191 * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
194 intel_dri2_flush(__DRIdrawable
*drawable
)
196 intel_dri2_flush_with_flags(drawable
->driContextPriv
, drawable
,
197 __DRI2_FLUSH_DRAWABLE
,
198 __DRI2_THROTTLE_SWAPBUFFER
);
201 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
202 .base
= { __DRI2_FLUSH
, 4 },
204 .flush
= intel_dri2_flush
,
205 .invalidate
= dri2InvalidateDrawable
,
206 .flush_with_flags
= intel_dri2_flush_with_flags
,
209 static struct intel_image_format intel_image_formats
[] = {
210 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
213 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
214 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
216 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
217 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
218 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
219 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
221 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
222 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
223 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
224 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
226 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
227 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
228 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
229 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
231 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
232 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
233 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
234 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
236 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
237 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
238 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
239 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
241 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
242 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
243 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
245 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
246 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
247 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
249 /* For YUYV buffers, we set up two overlapping DRI images and treat
250 * them as planar buffers in the compositors. Plane 0 is GR88 and
251 * samples YU or YV pairs and places Y into the R component, while
252 * plane 1 is ARGB and samples YUYV clusters and places pairs and
253 * places U into the G component and V into A. This lets the
254 * texture sampler interpolate the Y components correctly when
255 * sampling from plane 0, and interpolate U and V correctly when
256 * sampling from plane 1. */
257 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
258 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
259 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } }
262 static struct intel_image_format
*
263 intel_image_format_lookup(int fourcc
)
265 struct intel_image_format
*f
= NULL
;
267 for (unsigned i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
268 if (intel_image_formats
[i
].fourcc
== fourcc
) {
269 f
= &intel_image_formats
[i
];
278 intel_allocate_image(int dri_format
, void *loaderPrivate
)
282 image
= calloc(1, sizeof *image
);
286 image
->dri_format
= dri_format
;
289 switch (dri_format
) {
290 case __DRI_IMAGE_FORMAT_RGB565
:
291 image
->format
= MESA_FORMAT_RGB565
;
293 case __DRI_IMAGE_FORMAT_XRGB8888
:
294 image
->format
= MESA_FORMAT_XRGB8888
;
296 case __DRI_IMAGE_FORMAT_ARGB8888
:
297 image
->format
= MESA_FORMAT_ARGB8888
;
299 case __DRI_IMAGE_FORMAT_ABGR8888
:
300 image
->format
= MESA_FORMAT_RGBA8888_REV
;
302 case __DRI_IMAGE_FORMAT_XBGR8888
:
303 image
->format
= MESA_FORMAT_RGBX8888_REV
;
305 case __DRI_IMAGE_FORMAT_R8
:
306 image
->format
= MESA_FORMAT_R8
;
308 case __DRI_IMAGE_FORMAT_GR88
:
309 image
->format
= MESA_FORMAT_GR88
;
311 case __DRI_IMAGE_FORMAT_NONE
:
312 image
->format
= MESA_FORMAT_NONE
;
319 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
320 image
->data
= loaderPrivate
;
326 * Sets up a DRIImage structure to point to our shared image in a region
329 intel_setup_image_from_mipmap_tree(struct brw_context
*brw
, __DRIimage
*image
,
330 struct intel_mipmap_tree
*mt
, GLuint level
,
333 unsigned int draw_x
, draw_y
;
334 uint32_t mask_x
, mask_y
;
336 intel_miptree_make_shareable(brw
, mt
);
338 intel_miptree_check_level_layer(mt
, level
, zoffset
);
340 intel_region_get_tile_masks(mt
->region
, &mask_x
, &mask_y
, false);
341 intel_miptree_get_image_offset(mt
, level
, zoffset
, &draw_x
, &draw_y
);
343 image
->width
= mt
->level
[level
].width
;
344 image
->height
= mt
->level
[level
].height
;
345 image
->tile_x
= draw_x
& mask_x
;
346 image
->tile_y
= draw_y
& mask_y
;
348 image
->offset
= intel_region_get_aligned_offset(mt
->region
,
353 intel_region_reference(&image
->region
, mt
->region
);
357 intel_setup_image_from_dimensions(__DRIimage
*image
)
359 image
->width
= image
->region
->width
;
360 image
->height
= image
->region
->height
;
363 image
->has_depthstencil
= false;
366 static inline uint32_t
367 intel_dri_format(GLuint format
)
370 case MESA_FORMAT_RGB565
:
371 return __DRI_IMAGE_FORMAT_RGB565
;
372 case MESA_FORMAT_XRGB8888
:
373 return __DRI_IMAGE_FORMAT_XRGB8888
;
374 case MESA_FORMAT_ARGB8888
:
375 return __DRI_IMAGE_FORMAT_ARGB8888
;
376 case MESA_FORMAT_RGBA8888_REV
:
377 return __DRI_IMAGE_FORMAT_ABGR8888
;
379 return __DRI_IMAGE_FORMAT_R8
;
380 case MESA_FORMAT_RG88
:
381 return __DRI_IMAGE_FORMAT_GR88
;
384 return MESA_FORMAT_NONE
;
388 intel_create_image_from_name(__DRIscreen
*screen
,
389 int width
, int height
, int format
,
390 int name
, int pitch
, void *loaderPrivate
)
392 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
396 image
= intel_allocate_image(format
, loaderPrivate
);
400 if (image
->format
== MESA_FORMAT_NONE
)
403 cpp
= _mesa_get_format_bytes(image
->format
);
404 image
->region
= intel_region_alloc_for_handle(intelScreen
,
406 pitch
* cpp
, name
, "image");
407 if (image
->region
== NULL
) {
412 intel_setup_image_from_dimensions(image
);
418 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
419 int renderbuffer
, void *loaderPrivate
)
422 struct brw_context
*brw
= context
->driverPrivate
;
423 struct gl_context
*ctx
= &brw
->ctx
;
424 struct gl_renderbuffer
*rb
;
425 struct intel_renderbuffer
*irb
;
427 rb
= _mesa_lookup_renderbuffer(ctx
, renderbuffer
);
429 _mesa_error(ctx
, GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
433 irb
= intel_renderbuffer(rb
);
434 intel_miptree_make_shareable(brw
, irb
->mt
);
435 image
= calloc(1, sizeof *image
);
439 image
->internal_format
= rb
->InternalFormat
;
440 image
->format
= rb
->Format
;
442 image
->data
= loaderPrivate
;
443 intel_region_reference(&image
->region
, irb
->mt
->region
);
444 intel_setup_image_from_dimensions(image
);
445 image
->dri_format
= intel_dri_format(image
->format
);
446 image
->has_depthstencil
= irb
->mt
->stencil_mt
? true : false;
448 rb
->NeedsFinishRenderTexture
= true;
453 intel_create_image_from_texture(__DRIcontext
*context
, int target
,
454 unsigned texture
, int zoffset
,
460 struct brw_context
*brw
= context
->driverPrivate
;
461 struct gl_texture_object
*obj
;
462 struct intel_texture_object
*iobj
;
465 obj
= _mesa_lookup_texture(&brw
->ctx
, texture
);
466 if (!obj
|| obj
->Target
!= target
) {
467 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
471 if (target
== GL_TEXTURE_CUBE_MAP
)
474 _mesa_test_texobj_completeness(&brw
->ctx
, obj
);
475 iobj
= intel_texture_object(obj
);
476 if (!obj
->_BaseComplete
|| (level
> 0 && !obj
->_MipmapComplete
)) {
477 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
481 if (level
< obj
->BaseLevel
|| level
> obj
->_MaxLevel
) {
482 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
486 if (target
== GL_TEXTURE_3D
&& obj
->Image
[face
][level
]->Depth
< zoffset
) {
487 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
490 image
= calloc(1, sizeof *image
);
492 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
496 image
->internal_format
= obj
->Image
[face
][level
]->InternalFormat
;
497 image
->format
= obj
->Image
[face
][level
]->TexFormat
;
498 image
->data
= loaderPrivate
;
499 intel_setup_image_from_mipmap_tree(brw
, image
, iobj
->mt
, level
, zoffset
);
500 image
->dri_format
= intel_dri_format(image
->format
);
501 image
->has_depthstencil
= iobj
->mt
->stencil_mt
? true : false;
502 if (image
->dri_format
== MESA_FORMAT_NONE
) {
503 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
508 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
513 intel_destroy_image(__DRIimage
*image
)
515 intel_region_release(&image
->region
);
520 intel_create_image(__DRIscreen
*screen
,
521 int width
, int height
, int format
,
526 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
530 tiling
= I915_TILING_X
;
531 if (use
& __DRI_IMAGE_USE_CURSOR
) {
532 if (width
!= 64 || height
!= 64)
534 tiling
= I915_TILING_NONE
;
537 if (use
& __DRI_IMAGE_USE_LINEAR
)
538 tiling
= I915_TILING_NONE
;
540 image
= intel_allocate_image(format
, loaderPrivate
);
544 cpp
= _mesa_get_format_bytes(image
->format
);
546 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
547 if (image
->region
== NULL
) {
552 intel_setup_image_from_dimensions(image
);
558 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
561 case __DRI_IMAGE_ATTRIB_STRIDE
:
562 *value
= image
->region
->pitch
;
564 case __DRI_IMAGE_ATTRIB_HANDLE
:
565 *value
= image
->region
->bo
->handle
;
567 case __DRI_IMAGE_ATTRIB_NAME
:
568 return intel_region_flink(image
->region
, (uint32_t *) value
);
569 case __DRI_IMAGE_ATTRIB_FORMAT
:
570 *value
= image
->dri_format
;
572 case __DRI_IMAGE_ATTRIB_WIDTH
:
573 *value
= image
->region
->width
;
575 case __DRI_IMAGE_ATTRIB_HEIGHT
:
576 *value
= image
->region
->height
;
578 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
579 if (image
->planar_format
== NULL
)
581 *value
= image
->planar_format
->components
;
583 case __DRI_IMAGE_ATTRIB_FD
:
584 if (drm_intel_bo_gem_export_to_prime(image
->region
->bo
, value
) == 0)
593 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
597 image
= calloc(1, sizeof *image
);
601 intel_region_reference(&image
->region
, orig_image
->region
);
602 if (image
->region
== NULL
) {
607 image
->internal_format
= orig_image
->internal_format
;
608 image
->planar_format
= orig_image
->planar_format
;
609 image
->dri_format
= orig_image
->dri_format
;
610 image
->format
= orig_image
->format
;
611 image
->offset
= orig_image
->offset
;
612 image
->width
= orig_image
->width
;
613 image
->height
= orig_image
->height
;
614 image
->tile_x
= orig_image
->tile_x
;
615 image
->tile_y
= orig_image
->tile_y
;
616 image
->has_depthstencil
= orig_image
->has_depthstencil
;
617 image
->data
= loaderPrivate
;
619 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
620 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
626 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
628 if (use
& __DRI_IMAGE_USE_CURSOR
) {
629 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
637 intel_create_image_from_names(__DRIscreen
*screen
,
638 int width
, int height
, int fourcc
,
639 int *names
, int num_names
,
640 int *strides
, int *offsets
,
643 struct intel_image_format
*f
= NULL
;
647 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
650 f
= intel_image_format_lookup(fourcc
);
654 image
= intel_create_image_from_name(screen
, width
, height
,
655 __DRI_IMAGE_FORMAT_NONE
,
656 names
[0], strides
[0],
662 image
->planar_format
= f
;
663 for (i
= 0; i
< f
->nplanes
; i
++) {
664 index
= f
->planes
[i
].buffer_index
;
665 image
->offsets
[index
] = offsets
[index
];
666 image
->strides
[index
] = strides
[index
];
673 intel_create_image_from_fds(__DRIscreen
*screen
,
674 int width
, int height
, int fourcc
,
675 int *fds
, int num_fds
, int *strides
, int *offsets
,
678 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
679 struct intel_image_format
*f
;
683 if (fds
== NULL
|| num_fds
!= 1)
686 f
= intel_image_format_lookup(fourcc
);
691 image
= intel_allocate_image(f
->planes
[0].dri_format
, loaderPrivate
);
693 image
= intel_allocate_image(__DRI_IMAGE_FORMAT_NONE
, loaderPrivate
);
698 image
->region
= intel_region_alloc_for_fd(intelScreen
,
700 strides
[0], fds
[0], "image");
701 if (image
->region
== NULL
) {
706 image
->planar_format
= f
;
707 for (i
= 0; i
< f
->nplanes
; i
++) {
708 index
= f
->planes
[i
].buffer_index
;
709 image
->offsets
[index
] = offsets
[index
];
710 image
->strides
[index
] = strides
[index
];
713 intel_setup_image_from_dimensions(image
);
719 intel_create_image_from_dma_bufs(__DRIscreen
*screen
,
720 int width
, int height
, int fourcc
,
721 int *fds
, int num_fds
,
722 int *strides
, int *offsets
,
723 enum __DRIYUVColorSpace yuv_color_space
,
724 enum __DRISampleRange sample_range
,
725 enum __DRIChromaSiting horizontal_siting
,
726 enum __DRIChromaSiting vertical_siting
,
731 struct intel_image_format
*f
= intel_image_format_lookup(fourcc
);
733 /* For now only packed formats that have native sampling are supported. */
734 if (!f
|| f
->nplanes
!= 1) {
735 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
739 image
= intel_create_image_from_fds(screen
, width
, height
, fourcc
, fds
,
740 num_fds
, strides
, offsets
,
744 * Invalid parameters and any inconsistencies between are assumed to be
745 * checked by the caller. Therefore besides unsupported formats one can fail
746 * only in allocation.
749 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
753 image
->dma_buf_imported
= true;
754 image
->yuv_color_space
= yuv_color_space
;
755 image
->sample_range
= sample_range
;
756 image
->horizontal_siting
= horizontal_siting
;
757 image
->vertical_siting
= vertical_siting
;
759 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
764 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
766 int width
, height
, offset
, stride
, dri_format
, index
;
767 struct intel_image_format
*f
;
768 uint32_t mask_x
, mask_y
;
771 if (parent
== NULL
|| parent
->planar_format
== NULL
)
774 f
= parent
->planar_format
;
776 if (plane
>= f
->nplanes
)
779 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
780 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
781 dri_format
= f
->planes
[plane
].dri_format
;
782 index
= f
->planes
[plane
].buffer_index
;
783 offset
= parent
->offsets
[index
];
784 stride
= parent
->strides
[index
];
786 image
= intel_allocate_image(dri_format
, loaderPrivate
);
790 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
791 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
796 image
->region
= calloc(sizeof(*image
->region
), 1);
797 if (image
->region
== NULL
) {
802 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
803 image
->region
->width
= width
;
804 image
->region
->height
= height
;
805 image
->region
->pitch
= stride
;
806 image
->region
->refcount
= 1;
807 image
->region
->bo
= parent
->region
->bo
;
808 drm_intel_bo_reference(image
->region
->bo
);
809 image
->region
->tiling
= parent
->region
->tiling
;
810 image
->offset
= offset
;
811 intel_setup_image_from_dimensions(image
);
813 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
, false);
816 "intel_create_sub_image: offset not on tile boundary");
821 static struct __DRIimageExtensionRec intelImageExtension
= {
822 .base
= { __DRI_IMAGE
, 8 },
824 .createImageFromName
= intel_create_image_from_name
,
825 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
826 .destroyImage
= intel_destroy_image
,
827 .createImage
= intel_create_image
,
828 .queryImage
= intel_query_image
,
829 .dupImage
= intel_dup_image
,
830 .validateUsage
= intel_validate_usage
,
831 .createImageFromNames
= intel_create_image_from_names
,
832 .fromPlanar
= intel_from_planar
,
833 .createImageFromTexture
= intel_create_image_from_texture
,
834 .createImageFromFds
= intel_create_image_from_fds
,
835 .createImageFromDmaBufs
= intel_create_image_from_dma_bufs
838 static const __DRIextension
*intelScreenExtensions
[] = {
839 &intelTexBufferExtension
.base
,
840 &intelFlushExtension
.base
,
841 &intelImageExtension
.base
,
842 &dri2ConfigQueryExtension
.base
,
847 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
850 struct drm_i915_getparam gp
;
852 memset(&gp
, 0, sizeof(gp
));
856 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
859 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
867 intel_get_boolean(__DRIscreen
*psp
, int param
)
870 return intel_get_param(psp
, param
, &value
) && value
;
874 intelDestroyScreen(__DRIscreen
* sPriv
)
876 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
878 dri_bufmgr_destroy(intelScreen
->bufmgr
);
879 driDestroyOptionInfo(&intelScreen
->optionCache
);
882 sPriv
->driverPrivate
= NULL
;
887 * This is called when we need to set up GL rendering to a new X window.
890 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
891 __DRIdrawable
* driDrawPriv
,
892 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
894 struct intel_renderbuffer
*rb
;
895 struct intel_screen
*screen
= (struct intel_screen
*) driScrnPriv
->driverPrivate
;
897 unsigned num_samples
= intel_quantize_num_samples(screen
, mesaVis
->samples
);
898 struct gl_framebuffer
*fb
;
903 fb
= CALLOC_STRUCT(gl_framebuffer
);
907 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
909 if (mesaVis
->redBits
== 5)
910 rgbFormat
= MESA_FORMAT_RGB565
;
911 else if (mesaVis
->sRGBCapable
)
912 rgbFormat
= MESA_FORMAT_SARGB8
;
913 else if (mesaVis
->alphaBits
== 0)
914 rgbFormat
= MESA_FORMAT_XRGB8888
;
916 rgbFormat
= MESA_FORMAT_SARGB8
;
917 fb
->Visual
.sRGBCapable
= true;
920 /* setup the hardware-based renderbuffers */
921 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
922 _mesa_add_renderbuffer(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
924 if (mesaVis
->doubleBufferMode
) {
925 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
926 _mesa_add_renderbuffer(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
930 * Assert here that the gl_config has an expected depth/stencil bit
931 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
932 * which constructs the advertised configs.)
934 if (mesaVis
->depthBits
== 24) {
935 assert(mesaVis
->stencilBits
== 8);
937 if (screen
->hw_has_separate_stencil
) {
938 rb
= intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24
,
940 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
941 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8
,
943 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
946 * Use combined depth/stencil. Note that the renderbuffer is
947 * attached to two attachment points.
949 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24
,
951 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
952 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
955 else if (mesaVis
->depthBits
== 16) {
956 assert(mesaVis
->stencilBits
== 0);
957 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z16
,
959 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
962 assert(mesaVis
->depthBits
== 0);
963 assert(mesaVis
->stencilBits
== 0);
966 /* now add any/all software-based renderbuffers we may need */
967 _swrast_add_soft_renderbuffers(fb
,
968 false, /* never sw color */
969 false, /* never sw depth */
970 false, /* never sw stencil */
971 mesaVis
->accumRedBits
> 0,
972 false, /* never sw alpha */
973 false /* never sw aux */ );
974 driDrawPriv
->driverPrivate
= fb
;
980 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
982 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
984 _mesa_reference_framebuffer(&fb
, NULL
);
988 intel_init_bufmgr(struct intel_screen
*intelScreen
)
990 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
992 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
994 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
995 if (intelScreen
->bufmgr
== NULL
) {
996 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
1001 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
1003 if (!intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
)) {
1004 fprintf(stderr
, "[%s: %u] Kernel 2.6.39 required.\n", __func__
, __LINE__
);
1012 * Override intel_screen.hw_has_separate_stencil with environment variable
1013 * INTEL_SEPARATE_STENCIL.
1015 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1016 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1020 intel_override_separate_stencil(struct intel_screen
*screen
)
1022 const char *s
= getenv("INTEL_SEPARATE_STENCIL");
1025 } else if (!strncmp("0", s
, 2)) {
1026 screen
->hw_has_separate_stencil
= false;
1027 } else if (!strncmp("1", s
, 2)) {
1028 screen
->hw_has_separate_stencil
= true;
1031 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1032 "invalid value and is ignored", s
);
1037 intel_detect_swizzling(struct intel_screen
*screen
)
1039 drm_intel_bo
*buffer
;
1040 unsigned long flags
= 0;
1041 unsigned long aligned_pitch
;
1042 uint32_t tiling
= I915_TILING_X
;
1043 uint32_t swizzle_mode
= 0;
1045 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
1047 &tiling
, &aligned_pitch
, flags
);
1051 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
1052 drm_intel_bo_unreference(buffer
);
1054 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
1060 static __DRIconfig
**
1061 intel_screen_make_configs(__DRIscreen
*dri_screen
)
1063 static const gl_format formats
[] = {
1065 MESA_FORMAT_ARGB8888
1068 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1069 static const GLenum back_buffer_modes
[] = {
1070 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
1073 static const uint8_t singlesample_samples
[1] = {0};
1074 static const uint8_t multisample_samples
[2] = {4, 8};
1076 struct intel_screen
*screen
= dri_screen
->driverPrivate
;
1077 uint8_t depth_bits
[4], stencil_bits
[4];
1078 __DRIconfig
**configs
= NULL
;
1080 /* Generate singlesample configs without accumulation buffer. */
1081 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1082 __DRIconfig
**new_configs
;
1083 int num_depth_stencil_bits
= 2;
1085 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1086 * buffer that has a different number of bits per pixel than the color
1087 * buffer, gen >= 6 supports this.
1090 stencil_bits
[0] = 0;
1092 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1094 stencil_bits
[1] = 0;
1095 if (screen
->gen
>= 6) {
1097 stencil_bits
[2] = 8;
1098 num_depth_stencil_bits
= 3;
1102 stencil_bits
[1] = 8;
1105 new_configs
= driCreateConfigs(formats
[i
],
1108 num_depth_stencil_bits
,
1109 back_buffer_modes
, 2,
1110 singlesample_samples
, 1,
1112 configs
= driConcatConfigs(configs
, new_configs
);
1115 /* Generate the minimum possible set of configs that include an
1116 * accumulation buffer.
1118 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1119 __DRIconfig
**new_configs
;
1121 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1123 stencil_bits
[0] = 0;
1126 stencil_bits
[0] = 8;
1129 new_configs
= driCreateConfigs(formats
[i
],
1130 depth_bits
, stencil_bits
, 1,
1131 back_buffer_modes
, 1,
1132 singlesample_samples
, 1,
1134 configs
= driConcatConfigs(configs
, new_configs
);
1137 /* Generate multisample configs.
1139 * This loop breaks early, and hence is a no-op, on gen < 6.
1141 * Multisample configs must follow the singlesample configs in order to
1142 * work around an X server bug present in 1.12. The X server chooses to
1143 * associate the first listed RGBA888-Z24S8 config, regardless of its
1144 * sample count, with the 32-bit depth visual used for compositing.
1146 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1147 * supported. Singlebuffer configs are not supported because no one wants
1150 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1151 if (screen
->gen
< 6)
1154 __DRIconfig
**new_configs
;
1155 const int num_depth_stencil_bits
= 2;
1156 int num_msaa_modes
= 0;
1159 stencil_bits
[0] = 0;
1161 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1163 stencil_bits
[1] = 0;
1166 stencil_bits
[1] = 8;
1169 if (screen
->gen
>= 7)
1171 else if (screen
->gen
== 6)
1174 new_configs
= driCreateConfigs(formats
[i
],
1177 num_depth_stencil_bits
,
1178 back_buffer_modes
, 1,
1179 multisample_samples
,
1182 configs
= driConcatConfigs(configs
, new_configs
);
1185 if (configs
== NULL
) {
1186 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1195 set_max_gl_versions(struct intel_screen
*screen
)
1197 __DRIscreen
*psp
= screen
->driScrnPriv
;
1199 switch (screen
->gen
) {
1201 psp
->max_gl_core_version
= 32;
1202 psp
->max_gl_compat_version
= 30;
1203 psp
->max_gl_es1_version
= 11;
1204 psp
->max_gl_es2_version
= 30;
1207 psp
->max_gl_core_version
= 31;
1208 psp
->max_gl_compat_version
= 30;
1209 psp
->max_gl_es1_version
= 11;
1210 psp
->max_gl_es2_version
= 30;
1214 psp
->max_gl_core_version
= 0;
1215 psp
->max_gl_compat_version
= 21;
1216 psp
->max_gl_es1_version
= 11;
1217 psp
->max_gl_es2_version
= 20;
1220 assert(!"unrecognized intel_screen::gen");
1226 * This is the driver specific part of the createNewScreen entry point.
1227 * Called when using DRI2.
1229 * \return the struct gl_config supported by this driver
1232 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1234 struct intel_screen
*intelScreen
;
1236 if (psp
->dri2
.loader
->base
.version
<= 2 ||
1237 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1239 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1240 "support required\n");
1244 /* Allocate the private area */
1245 intelScreen
= calloc(1, sizeof *intelScreen
);
1247 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1250 /* parse information in __driConfigOptions */
1251 driParseOptionInfo(&intelScreen
->optionCache
, __driConfigOptions
);
1253 intelScreen
->driScrnPriv
= psp
;
1254 psp
->driverPrivate
= (void *) intelScreen
;
1256 if (!intel_init_bufmgr(intelScreen
))
1259 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1260 intelScreen
->devinfo
= brw_get_device_info(intelScreen
->deviceID
);
1262 if (IS_GEN7(intelScreen
->deviceID
)) {
1263 intelScreen
->gen
= 7;
1264 } else if (IS_GEN6(intelScreen
->deviceID
)) {
1265 intelScreen
->gen
= 6;
1266 } else if (IS_GEN5(intelScreen
->deviceID
)) {
1267 intelScreen
->gen
= 5;
1269 intelScreen
->gen
= 4;
1272 intelScreen
->hw_has_separate_stencil
= intelScreen
->gen
>= 6;
1273 intelScreen
->hw_must_use_separate_stencil
= intelScreen
->gen
>= 7;
1276 bool success
= intel_get_param(intelScreen
->driScrnPriv
, I915_PARAM_HAS_LLC
,
1278 if (success
&& has_llc
)
1279 intelScreen
->hw_has_llc
= true;
1280 else if (!success
&& intelScreen
->gen
>= 6)
1281 intelScreen
->hw_has_llc
= true;
1283 intel_override_separate_stencil(intelScreen
);
1285 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1287 set_max_gl_versions(intelScreen
);
1289 psp
->extensions
= intelScreenExtensions
;
1291 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1294 struct intel_buffer
{
1296 struct intel_region
*region
;
1299 static __DRIbuffer
*
1300 intelAllocateBuffer(__DRIscreen
*screen
,
1301 unsigned attachment
, unsigned format
,
1302 int width
, int height
)
1304 struct intel_buffer
*intelBuffer
;
1305 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1307 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1308 attachment
== __DRI_BUFFER_BACK_LEFT
);
1310 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1311 if (intelBuffer
== NULL
)
1314 /* The front and back buffers are color buffers, which are X tiled. */
1315 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1322 if (intelBuffer
->region
== NULL
) {
1327 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1329 intelBuffer
->base
.attachment
= attachment
;
1330 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1331 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1333 return &intelBuffer
->base
;
1337 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1339 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1341 intel_region_release(&intelBuffer
->region
);
1346 const struct __DriverAPIRec driDriverAPI
= {
1347 .InitScreen
= intelInitScreen2
,
1348 .DestroyScreen
= intelDestroyScreen
,
1349 .CreateContext
= brwCreateContext
,
1350 .DestroyContext
= intelDestroyContext
,
1351 .CreateBuffer
= intelCreateBuffer
,
1352 .DestroyBuffer
= intelDestroyBuffer
,
1353 .MakeCurrent
= intelMakeCurrent
,
1354 .UnbindContext
= intelUnbindContext
,
1355 .AllocateBuffer
= intelAllocateBuffer
,
1356 .ReleaseBuffer
= intelReleaseBuffer
1359 /* This is the table of extensions that the loader will dlsym() for. */
1360 PUBLIC
const __DRIextension
*__driDriverExtensions
[] = {
1361 &driCoreExtension
.base
,
1362 &driDRI2Extension
.base
,