src/mesa/drivers/dri/i965/intel_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include <errno.h>
  29 #include <time.h>
  30 #include <unistd.h>
  31 #include "main/glheader.h"
  32 #include "main/context.h"
  33 #include "main/framebuffer.h"
  34 #include "main/renderbuffer.h"
  35 #include "main/texobj.h"
  36 #include "main/hash.h"
  37 #include "main/fbobject.h"
  38 #include "main/version.h"
  39 #include "swrast/s_renderbuffer.h"
  40
  41 #include "utils.h"
  42 #include "xmlpool.h"
  43
  44 static const __DRIconfigOptionsExtension brw_config_options = {
  45    .base = { __DRI_CONFIG_OPTIONS, 1 },
  46    .xml =
  47 DRI_CONF_BEGIN
  48    DRI_CONF_SECTION_PERFORMANCE
  49       DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
  50       /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
  51        * DRI_CONF_BO_REUSE_ALL
  52        */
  53       DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
  54          DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
  55             DRI_CONF_ENUM(0, "Disable buffer object reuse")
  56             DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
  57          DRI_CONF_DESC_END
  58       DRI_CONF_OPT_END
  59
  60       DRI_CONF_OPT_BEGIN_B(hiz, "true")
  61          DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
  62       DRI_CONF_OPT_END
  63
  64       DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization, "false")
  65          DRI_CONF_DESC(en, "Derivatives with finer granularity by default")
  66       DRI_CONF_OPT_END
  67    DRI_CONF_SECTION_END
  68
  69    DRI_CONF_SECTION_QUALITY
  70       DRI_CONF_FORCE_S3TC_ENABLE("false")
  71
  72       DRI_CONF_OPT_BEGIN(clamp_max_samples, int, -1)
  73               DRI_CONF_DESC(en, "Clamp the value of GL_MAX_SAMPLES to the "
  74                             "given integer. If negative, then do not clamp.")
  75       DRI_CONF_OPT_END
  76    DRI_CONF_SECTION_END
  77
  78    DRI_CONF_SECTION_DEBUG
  79       DRI_CONF_NO_RAST("false")
  80       DRI_CONF_ALWAYS_FLUSH_BATCH("false")
  81       DRI_CONF_ALWAYS_FLUSH_CACHE("false")
  82       DRI_CONF_DISABLE_THROTTLING("false")
  83       DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
  84       DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
  85       DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
  86
  87       DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
  88          DRI_CONF_DESC(en, "Perform code generation at shader link time.")
  89       DRI_CONF_OPT_END
  90    DRI_CONF_SECTION_END
  91 DRI_CONF_END
  92 };
  93
  94 #include "intel_batchbuffer.h"
  95 #include "intel_buffers.h"
  96 #include "intel_bufmgr.h"
  97 #include "intel_chipset.h"
  98 #include "intel_fbo.h"
  99 #include "intel_mipmap_tree.h"
 100 #include "intel_screen.h"
 101 #include "intel_tex.h"
 102 #include "intel_regions.h"
 103
 104 #include "brw_context.h"
 105
 106 #include "i915_drm.h"
 107
 108 #ifdef USE_NEW_INTERFACE
 109 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
 110 #endif /*USE_NEW_INTERFACE */
 111
 112 /**
 113  * For debugging purposes, this returns a time in seconds.
 114  */
 115 double
 116 get_time(void)
 117 {
 118    struct timespec tp;
 119
 120    clock_gettime(CLOCK_MONOTONIC, &tp);
 121
 122    return tp.tv_sec + tp.tv_nsec / 1000000000.0;
 123 }
 124
 125 void
 126 aub_dump_bmp(struct gl_context *ctx)
 127 {
 128    struct gl_framebuffer *fb = ctx->DrawBuffer;
 129
 130    for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
 131       struct intel_renderbuffer *irb =
 132          intel_renderbuffer(fb->_ColorDrawBuffers[i]);
 133
 134       if (irb && irb->mt) {
 135          enum aub_dump_bmp_format format;
 136
 137          switch (irb->Base.Base.Format) {
 138          case MESA_FORMAT_ARGB8888:
 139          case MESA_FORMAT_XRGB8888:
 140             format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
 141             break;
 142          default:
 143             continue;
 144          }
 145
 146          assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
 147          drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
 148                                        irb->draw_x,
 149                                        irb->draw_y,
 150                                        irb->Base.Base.Width,
 151                                        irb->Base.Base.Height,
 152                                        format,
 153                                        irb->mt->region->pitch,
 154                                        0);
 155       }
 156    }
 157 }
 158
 159 static const __DRItexBufferExtension intelTexBufferExtension = {
 160    .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 161
 162    .setTexBuffer        = intelSetTexBuffer,
 163    .setTexBuffer2       = intelSetTexBuffer2,
 164    .releaseTexBuffer    = NULL,
 165 };
 166
 167 static void
 168 intel_dri2_flush_with_flags(__DRIcontext *cPriv,
 169                             __DRIdrawable *dPriv,
 170                             unsigned flags,
 171                             enum __DRI2throttleReason reason)
 172 {
 173    struct brw_context *brw = cPriv->driverPrivate;
 174
 175    if (!brw)
 176       return;
 177
 178    struct gl_context *ctx = &brw->ctx;
 179
 180    FLUSH_VERTICES(ctx, 0);
 181
 182    if (flags & __DRI2_FLUSH_DRAWABLE)
 183       intel_resolve_for_dri2_flush(brw, dPriv);
 184
 185    if (reason == __DRI2_THROTTLE_SWAPBUFFER ||
 186        reason == __DRI2_THROTTLE_FLUSHFRONT) {
 187       brw->need_throttle = true;
 188    }
 189
 190    intel_batchbuffer_flush(brw);
 191
 192    if (INTEL_DEBUG & DEBUG_AUB) {
 193       aub_dump_bmp(ctx);
 194    }
 195 }
 196
 197 /**
 198  * Provides compatibility with loaders that only support the older (version
 199  * 1-3) flush interface.
 200  *
 201  * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
 202  */
 203 static void
 204 intel_dri2_flush(__DRIdrawable *drawable)
 205 {
 206    intel_dri2_flush_with_flags(drawable->driContextPriv, drawable,
 207                                __DRI2_FLUSH_DRAWABLE,
 208                                __DRI2_THROTTLE_SWAPBUFFER);
 209 }
 210
 211 static const struct __DRI2flushExtensionRec intelFlushExtension = {
 212     .base = { __DRI2_FLUSH, 4 },
 213
 214     .flush              = intel_dri2_flush,
 215     .invalidate         = dri2InvalidateDrawable,
 216     .flush_with_flags   = intel_dri2_flush_with_flags,
 217 };
 218
 219 static struct intel_image_format intel_image_formats[] = {
 220    { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
 221      { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
 222
 223    { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
 224      { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
 225
 226    { __DRI_IMAGE_FOURCC_RGB565, __DRI_IMAGE_COMPONENTS_RGB, 1,
 227      { { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565, 2 } } },
 228
 229    { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 230      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 231        { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
 232        { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
 233
 234    { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 235      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 236        { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 237        { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 238
 239    { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 240      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 241        { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
 242        { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
 243
 244    { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 245      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 246        { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 247        { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 248
 249    { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
 250      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 251        { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 252        { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 253
 254    { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
 255      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 256        { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
 257
 258    { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
 259      { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
 260        { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
 261
 262    /* For YUYV buffers, we set up two overlapping DRI images and treat
 263     * them as planar buffers in the compositors.  Plane 0 is GR88 and
 264     * samples YU or YV pairs and places Y into the R component, while
 265     * plane 1 is ARGB and samples YUYV clusters and places pairs and
 266     * places U into the G component and V into A.  This lets the
 267     * texture sampler interpolate the Y components correctly when
 268     * sampling from plane 0, and interpolate U and V correctly when
 269     * sampling from plane 1. */
 270    { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
 271      { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
 272        { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
 273 };
 274
 275 static struct intel_image_format *
 276 intel_image_format_lookup(int fourcc)
 277 {
 278    struct intel_image_format *f = NULL;
 279
 280    for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
 281       if (intel_image_formats[i].fourcc == fourcc) {
 282          f = &intel_image_formats[i];
 283          break;
 284       }
 285    }
 286
 287    return f;
 288 }
 289
 290 static __DRIimage *
 291 intel_allocate_image(int dri_format, void *loaderPrivate)
 292 {
 293     __DRIimage *image;
 294
 295     image = calloc(1, sizeof *image);
 296     if (image == NULL)
 297         return NULL;
 298
 299     image->dri_format = dri_format;
 300     image->offset = 0;
 301
 302     switch (dri_format) {
 303     case __DRI_IMAGE_FORMAT_RGB565:
 304        image->format = MESA_FORMAT_RGB565;
 305        break;
 306     case __DRI_IMAGE_FORMAT_XRGB8888:
 307        image->format = MESA_FORMAT_XRGB8888;
 308        break;
 309     case __DRI_IMAGE_FORMAT_ARGB2101010:
 310        image->format = MESA_FORMAT_ARGB2101010;
 311        break;
 312     case __DRI_IMAGE_FORMAT_XRGB2101010:
 313        image->format = MESA_FORMAT_XRGB2101010_UNORM;
 314        break;
 315     case __DRI_IMAGE_FORMAT_ARGB8888:
 316        image->format = MESA_FORMAT_ARGB8888;
 317        break;
 318     case __DRI_IMAGE_FORMAT_ABGR8888:
 319        image->format = MESA_FORMAT_RGBA8888_REV;
 320        break;
 321     case __DRI_IMAGE_FORMAT_XBGR8888:
 322        image->format = MESA_FORMAT_RGBX8888_REV;
 323        break;
 324     case __DRI_IMAGE_FORMAT_R8:
 325        image->format = MESA_FORMAT_R8;
 326        break;
 327     case __DRI_IMAGE_FORMAT_GR88:
 328        image->format = MESA_FORMAT_GR88;
 329        break;
 330     case __DRI_IMAGE_FORMAT_NONE:
 331        image->format = MESA_FORMAT_NONE;
 332        break;
 333     default:
 334        free(image);
 335        return NULL;
 336     }
 337
 338     image->internal_format = _mesa_get_format_base_format(image->format);
 339     image->data = loaderPrivate;
 340
 341     return image;
 342 }
 343
 344 /**
 345  * Sets up a DRIImage structure to point to our shared image in a region
 346  */
 347 static void
 348 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
 349                                    struct intel_mipmap_tree *mt, GLuint level,
 350                                    GLuint zoffset)
 351 {
 352    unsigned int draw_x, draw_y;
 353    uint32_t mask_x, mask_y;
 354
 355    intel_miptree_make_shareable(brw, mt);
 356
 357    intel_miptree_check_level_layer(mt, level, zoffset);
 358
 359    intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
 360    intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
 361
 362    image->width = mt->level[level].width;
 363    image->height = mt->level[level].height;
 364    image->tile_x = draw_x & mask_x;
 365    image->tile_y = draw_y & mask_y;
 366
 367    image->offset = intel_region_get_aligned_offset(mt->region,
 368                                                    draw_x & ~mask_x,
 369                                                    draw_y & ~mask_y,
 370                                                    false);
 371
 372    intel_region_reference(&image->region, mt->region);
 373 }
 374
 375 static void
 376 intel_setup_image_from_dimensions(__DRIimage *image)
 377 {
 378    image->width    = image->region->width;
 379    image->height   = image->region->height;
 380    image->tile_x = 0;
 381    image->tile_y = 0;
 382    image->has_depthstencil = false;
 383 }
 384
 385 static inline uint32_t
 386 intel_dri_format(GLuint format)
 387 {
 388    switch (format) {
 389    case MESA_FORMAT_RGB565:
 390       return __DRI_IMAGE_FORMAT_RGB565;
 391    case MESA_FORMAT_XRGB8888:
 392       return __DRI_IMAGE_FORMAT_XRGB8888;
 393    case MESA_FORMAT_ARGB8888:
 394       return __DRI_IMAGE_FORMAT_ARGB8888;
 395    case MESA_FORMAT_RGBA8888_REV:
 396       return __DRI_IMAGE_FORMAT_ABGR8888;
 397    case MESA_FORMAT_R8:
 398       return __DRI_IMAGE_FORMAT_R8;
 399    case MESA_FORMAT_RG88:
 400       return __DRI_IMAGE_FORMAT_GR88;
 401    case MESA_FORMAT_XRGB2101010_UNORM:
 402       return __DRI_IMAGE_FORMAT_XRGB2101010;
 403    case MESA_FORMAT_ARGB2101010:
 404       return __DRI_IMAGE_FORMAT_ARGB2101010;
 405    }
 406
 407    return MESA_FORMAT_NONE;
 408 }
 409
 410 static __DRIimage *
 411 intel_create_image_from_name(__DRIscreen *screen,
 412                              int width, int height, int format,
 413                              int name, int pitch, void *loaderPrivate)
 414 {
 415     struct intel_screen *intelScreen = screen->driverPrivate;
 416     __DRIimage *image;
 417     int cpp;
 418
 419     image = intel_allocate_image(format, loaderPrivate);
 420     if (image == NULL)
 421        return NULL;
 422
 423     if (image->format == MESA_FORMAT_NONE)
 424        cpp = 1;
 425     else
 426        cpp = _mesa_get_format_bytes(image->format);
 427     image->region = intel_region_alloc_for_handle(intelScreen,
 428                                                   cpp, width, height,
 429                                                   pitch * cpp, name, "image");
 430     if (image->region == NULL) {
 431        free(image);
 432        return NULL;
 433     }
 434
 435     intel_setup_image_from_dimensions(image);
 436
 437     return image;
 438 }
 439
 440 static __DRIimage *
 441 intel_create_image_from_renderbuffer(__DRIcontext *context,
 442                                      int renderbuffer, void *loaderPrivate)
 443 {
 444    __DRIimage *image;
 445    struct brw_context *brw = context->driverPrivate;
 446    struct gl_context *ctx = &brw->ctx;
 447    struct gl_renderbuffer *rb;
 448    struct intel_renderbuffer *irb;
 449
 450    rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
 451    if (!rb) {
 452       _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 453       return NULL;
 454    }
 455
 456    irb = intel_renderbuffer(rb);
 457    intel_miptree_make_shareable(brw, irb->mt);
 458    image = calloc(1, sizeof *image);
 459    if (image == NULL)
 460       return NULL;
 461
 462    image->internal_format = rb->InternalFormat;
 463    image->format = rb->Format;
 464    image->offset = 0;
 465    image->data = loaderPrivate;
 466    intel_region_reference(&image->region, irb->mt->region);
 467    intel_setup_image_from_dimensions(image);
 468    image->dri_format = intel_dri_format(image->format);
 469    image->has_depthstencil = irb->mt->stencil_mt? true : false;
 470
 471    rb->NeedsFinishRenderTexture = true;
 472    return image;
 473 }
 474
 475 static __DRIimage *
 476 intel_create_image_from_texture(__DRIcontext *context, int target,
 477                                 unsigned texture, int zoffset,
 478                                 int level,
 479                                 unsigned *error,
 480                                 void *loaderPrivate)
 481 {
 482    __DRIimage *image;
 483    struct brw_context *brw = context->driverPrivate;
 484    struct gl_texture_object *obj;
 485    struct intel_texture_object *iobj;
 486    GLuint face = 0;
 487
 488    obj = _mesa_lookup_texture(&brw->ctx, texture);
 489    if (!obj || obj->Target != target) {
 490       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 491       return NULL;
 492    }
 493
 494    if (target == GL_TEXTURE_CUBE_MAP)
 495       face = zoffset;
 496
 497    _mesa_test_texobj_completeness(&brw->ctx, obj);
 498    iobj = intel_texture_object(obj);
 499    if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
 500       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 501       return NULL;
 502    }
 503
 504    if (level < obj->BaseLevel || level > obj->_MaxLevel) {
 505       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 506       return NULL;
 507    }
 508
 509    if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
 510       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 511       return NULL;
 512    }
 513    image = calloc(1, sizeof *image);
 514    if (image == NULL) {
 515       *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
 516       return NULL;
 517    }
 518
 519    image->internal_format = obj->Image[face][level]->InternalFormat;
 520    image->format = obj->Image[face][level]->TexFormat;
 521    image->data = loaderPrivate;
 522    intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
 523    image->dri_format = intel_dri_format(image->format);
 524    image->has_depthstencil = iobj->mt->stencil_mt? true : false;
 525    if (image->dri_format == MESA_FORMAT_NONE) {
 526       *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
 527       free(image);
 528       return NULL;
 529    }
 530
 531    *error = __DRI_IMAGE_ERROR_SUCCESS;
 532    return image;
 533 }
 534
 535 static void
 536 intel_destroy_image(__DRIimage *image)
 537 {
 538     intel_region_release(&image->region);
 539     free(image);
 540 }
 541
 542 static __DRIimage *
 543 intel_create_image(__DRIscreen *screen,
 544                    int width, int height, int format,
 545                    unsigned int use,
 546                    void *loaderPrivate)
 547 {
 548    __DRIimage *image;
 549    struct intel_screen *intelScreen = screen->driverPrivate;
 550    uint32_t tiling;
 551    int cpp;
 552
 553    tiling = I915_TILING_X;
 554    if (use & __DRI_IMAGE_USE_CURSOR) {
 555       if (width != 64 || height != 64)
 556          return NULL;
 557       tiling = I915_TILING_NONE;
 558    }
 559
 560    if (use & __DRI_IMAGE_USE_LINEAR)
 561       tiling = I915_TILING_NONE;
 562
 563    image = intel_allocate_image(format, loaderPrivate);
 564    if (image == NULL)
 565       return NULL;
 566
 567    cpp = _mesa_get_format_bytes(image->format);
 568    image->region =
 569       intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
 570    if (image->region == NULL) {
 571       free(image);
 572       return NULL;
 573    }
 574
 575    intel_setup_image_from_dimensions(image);
 576
 577    return image;
 578 }
 579
 580 static GLboolean
 581 intel_query_image(__DRIimage *image, int attrib, int *value)
 582 {
 583    switch (attrib) {
 584    case __DRI_IMAGE_ATTRIB_STRIDE:
 585       *value = image->region->pitch;
 586       return true;
 587    case __DRI_IMAGE_ATTRIB_HANDLE:
 588       *value = image->region->bo->handle;
 589       return true;
 590    case __DRI_IMAGE_ATTRIB_NAME:
 591       return intel_region_flink(image->region, (uint32_t *) value);
 592    case __DRI_IMAGE_ATTRIB_FORMAT:
 593       *value = image->dri_format;
 594       return true;
 595    case __DRI_IMAGE_ATTRIB_WIDTH:
 596       *value = image->region->width;
 597       return true;
 598    case __DRI_IMAGE_ATTRIB_HEIGHT:
 599       *value = image->region->height;
 600       return true;
 601    case __DRI_IMAGE_ATTRIB_COMPONENTS:
 602       if (image->planar_format == NULL)
 603          return false;
 604       *value = image->planar_format->components;
 605       return true;
 606    case __DRI_IMAGE_ATTRIB_FD:
 607       if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
 608          return true;
 609       return false;
 610   default:
 611       return false;
 612    }
 613 }
 614
 615 static __DRIimage *
 616 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
 617 {
 618    __DRIimage *image;
 619
 620    image = calloc(1, sizeof *image);
 621    if (image == NULL)
 622       return NULL;
 623
 624    intel_region_reference(&image->region, orig_image->region);
 625    if (image->region == NULL) {
 626       free(image);
 627       return NULL;
 628    }
 629
 630    image->internal_format = orig_image->internal_format;
 631    image->planar_format   = orig_image->planar_format;
 632    image->dri_format      = orig_image->dri_format;
 633    image->format          = orig_image->format;
 634    image->offset          = orig_image->offset;
 635    image->width           = orig_image->width;
 636    image->height          = orig_image->height;
 637    image->tile_x          = orig_image->tile_x;
 638    image->tile_y          = orig_image->tile_y;
 639    image->has_depthstencil = orig_image->has_depthstencil;
 640    image->data            = loaderPrivate;
 641
 642    memcpy(image->strides, orig_image->strides, sizeof(image->strides));
 643    memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
 644
 645    return image;
 646 }
 647
 648 static GLboolean
 649 intel_validate_usage(__DRIimage *image, unsigned int use)
 650 {
 651    if (use & __DRI_IMAGE_USE_CURSOR) {
 652       if (image->region->width != 64 || image->region->height != 64)
 653          return GL_FALSE;
 654    }
 655
 656    return GL_TRUE;
 657 }
 658
 659 static __DRIimage *
 660 intel_create_image_from_names(__DRIscreen *screen,
 661                               int width, int height, int fourcc,
 662                               int *names, int num_names,
 663                               int *strides, int *offsets,
 664                               void *loaderPrivate)
 665 {
 666     struct intel_image_format *f = NULL;
 667     __DRIimage *image;
 668     int i, index;
 669
 670     if (screen == NULL || names == NULL || num_names != 1)
 671         return NULL;
 672
 673     f = intel_image_format_lookup(fourcc);
 674     if (f == NULL)
 675         return NULL;
 676
 677     image = intel_create_image_from_name(screen, width, height,
 678                                          __DRI_IMAGE_FORMAT_NONE,
 679                                          names[0], strides[0],
 680                                          loaderPrivate);
 681
 682    if (image == NULL)
 683       return NULL;
 684
 685     image->planar_format = f;
 686     for (i = 0; i < f->nplanes; i++) {
 687         index = f->planes[i].buffer_index;
 688         image->offsets[index] = offsets[index];
 689         image->strides[index] = strides[index];
 690     }
 691
 692     return image;
 693 }
 694
 695 static __DRIimage *
 696 intel_create_image_from_fds(__DRIscreen *screen,
 697                             int width, int height, int fourcc,
 698                             int *fds, int num_fds, int *strides, int *offsets,
 699                             void *loaderPrivate)
 700 {
 701    struct intel_screen *intelScreen = screen->driverPrivate;
 702    struct intel_image_format *f;
 703    __DRIimage *image;
 704    int i, index;
 705
 706    if (fds == NULL || num_fds != 1)
 707       return NULL;
 708
 709    f = intel_image_format_lookup(fourcc);
 710    if (f == NULL)
 711       return NULL;
 712
 713    if (f->nplanes == 1)
 714       image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
 715    else
 716       image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
 717
 718    if (image == NULL)
 719       return NULL;
 720
 721    image->region = intel_region_alloc_for_fd(intelScreen,
 722                                              f->planes[0].cpp, width, height, strides[0],
 723                                              height * strides[0], fds[0], "image");
 724    if (image->region == NULL) {
 725       free(image);
 726       return NULL;
 727    }
 728
 729    image->planar_format = f;
 730    for (i = 0; i < f->nplanes; i++) {
 731       index = f->planes[i].buffer_index;
 732       image->offsets[index] = offsets[index];
 733       image->strides[index] = strides[index];
 734    }
 735
 736    intel_setup_image_from_dimensions(image);
 737
 738    return image;
 739 }
 740
 741 static __DRIimage *
 742 intel_create_image_from_dma_bufs(__DRIscreen *screen,
 743                                  int width, int height, int fourcc,
 744                                  int *fds, int num_fds,
 745                                  int *strides, int *offsets,
 746                                  enum __DRIYUVColorSpace yuv_color_space,
 747                                  enum __DRISampleRange sample_range,
 748                                  enum __DRIChromaSiting horizontal_siting,
 749                                  enum __DRIChromaSiting vertical_siting,
 750                                  unsigned *error,
 751                                  void *loaderPrivate)
 752 {
 753    __DRIimage *image;
 754    struct intel_image_format *f = intel_image_format_lookup(fourcc);
 755
 756    /* For now only packed formats that have native sampling are supported. */
 757    if (!f || f->nplanes != 1) {
 758       *error = __DRI_IMAGE_ERROR_BAD_MATCH;
 759       return NULL;
 760    }
 761
 762    image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
 763                                        num_fds, strides, offsets,
 764                                        loaderPrivate);
 765
 766    /*
 767     * Invalid parameters and any inconsistencies between are assumed to be
 768     * checked by the caller. Therefore besides unsupported formats one can fail
 769     * only in allocation.
 770     */
 771    if (!image) {
 772       *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
 773       return NULL;
 774    }
 775
 776    image->dma_buf_imported = true;
 777    image->yuv_color_space = yuv_color_space;
 778    image->sample_range = sample_range;
 779    image->horizontal_siting = horizontal_siting;
 780    image->vertical_siting = vertical_siting;
 781
 782    *error = __DRI_IMAGE_ERROR_SUCCESS;
 783    return image;
 784 }
 785
 786 static __DRIimage *
 787 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
 788 {
 789     int width, height, offset, stride, dri_format, index;
 790     struct intel_image_format *f;
 791     uint32_t mask_x, mask_y;
 792     __DRIimage *image;
 793
 794     if (parent == NULL || parent->planar_format == NULL)
 795         return NULL;
 796
 797     f = parent->planar_format;
 798
 799     if (plane >= f->nplanes)
 800         return NULL;
 801
 802     width = parent->region->width >> f->planes[plane].width_shift;
 803     height = parent->region->height >> f->planes[plane].height_shift;
 804     dri_format = f->planes[plane].dri_format;
 805     index = f->planes[plane].buffer_index;
 806     offset = parent->offsets[index];
 807     stride = parent->strides[index];
 808
 809     image = intel_allocate_image(dri_format, loaderPrivate);
 810     if (image == NULL)
 811        return NULL;
 812
 813     if (offset + height * stride > parent->region->bo->size) {
 814        _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
 815        free(image);
 816        return NULL;
 817     }
 818
 819     image->region = calloc(sizeof(*image->region), 1);
 820     if (image->region == NULL) {
 821        free(image);
 822        return NULL;
 823     }
 824
 825     image->region->cpp = _mesa_get_format_bytes(image->format);
 826     image->region->width = width;
 827     image->region->height = height;
 828     image->region->pitch = stride;
 829     image->region->refcount = 1;
 830     image->region->bo = parent->region->bo;
 831     drm_intel_bo_reference(image->region->bo);
 832     image->region->tiling = parent->region->tiling;
 833     image->offset = offset;
 834     intel_setup_image_from_dimensions(image);
 835
 836     intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
 837     if (offset & mask_x)
 838        _mesa_warning(NULL,
 839                      "intel_create_sub_image: offset not on tile boundary");
 840
 841     return image;
 842 }
 843
 844 static struct __DRIimageExtensionRec intelImageExtension = {
 845     .base = { __DRI_IMAGE, 8 },
 846
 847     .createImageFromName                = intel_create_image_from_name,
 848     .createImageFromRenderbuffer        = intel_create_image_from_renderbuffer,
 849     .destroyImage                       = intel_destroy_image,
 850     .createImage                        = intel_create_image,
 851     .queryImage                         = intel_query_image,
 852     .dupImage                           = intel_dup_image,
 853     .validateUsage                      = intel_validate_usage,
 854     .createImageFromNames               = intel_create_image_from_names,
 855     .fromPlanar                         = intel_from_planar,
 856     .createImageFromTexture             = intel_create_image_from_texture,
 857     .createImageFromFds                 = intel_create_image_from_fds,
 858     .createImageFromDmaBufs             = intel_create_image_from_dma_bufs
 859 };
 860
 861 static int
 862 brw_query_renderer_integer(__DRIscreen *psp, int param, int *value)
 863 {
 864    const struct intel_screen *const intelScreen =
 865       (struct intel_screen *) psp->driverPrivate;
 866
 867    switch (param) {
 868    case __DRI2_RENDERER_VENDOR_ID:
 869       value[0] = 0x8086;
 870       return 0;
 871    case __DRI2_RENDERER_DEVICE_ID:
 872       value[0] = intelScreen->deviceID;
 873       return 0;
 874    case __DRI2_RENDERER_ACCELERATED:
 875       value[0] = 1;
 876       return 0;
 877    case __DRI2_RENDERER_VIDEO_MEMORY: {
 878       /* Once a batch uses more than 75% of the maximum mappable size, we
 879        * assume that there's some fragmentation, and we start doing extra
 880        * flushing, etc.  That's the big cliff apps will care about.
 881        *
 882        * Can only map 2G onto the GPU through the GTT.
 883        */
 884       const unsigned gpu_mappable_megabytes = 2 * 1024 * 3 / 4;
 885
 886       const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
 887       const long system_page_size = sysconf(_SC_PAGE_SIZE);
 888
 889       if (system_memory_pages <= 0 || system_page_size <= 0)
 890          return -1;
 891
 892       const uint64_t system_memory_bytes = (uint64_t) system_memory_pages
 893          * (uint64_t) system_page_size;
 894
 895       const unsigned system_memory_megabytes =
 896          (unsigned) (system_memory_bytes / 1024);
 897
 898       value[0] = MIN2(system_memory_megabytes, gpu_mappable_megabytes);
 899       return 0;
 900    }
 901    case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE:
 902       value[0] = 1;
 903       return 0;
 904    case __DRI2_RENDERER_PREFERRED_PROFILE:
 905       value[0] = (psp->max_gl_core_version != 0)
 906          ? (1U << __DRI_API_OPENGL_CORE) : (1U << __DRI_API_OPENGL);
 907       return 0;
 908    default:
 909       return driQueryRendererIntegerCommon(psp, param, value);
 910    }
 911
 912    return -1;
 913 }
 914
 915 static int
 916 brw_query_renderer_string(__DRIscreen *psp, int param, const char **value)
 917 {
 918    const struct intel_screen *intelScreen =
 919       (struct intel_screen *) psp->driverPrivate;
 920
 921    switch (param) {
 922    case __DRI2_RENDERER_VENDOR_ID:
 923       value[0] = brw_vendor_string;
 924       return 0;
 925    case __DRI2_RENDERER_DEVICE_ID:
 926       value[0] = brw_get_renderer_string(intelScreen->deviceID);
 927       return 0;
 928    default:
 929       break;
 930    }
 931
 932    return -1;
 933 }
 934
 935 static struct __DRI2rendererQueryExtensionRec intelRendererQueryExtension = {
 936    .base = { __DRI2_RENDERER_QUERY, 1 },
 937
 938    .queryInteger = brw_query_renderer_integer,
 939    .queryString = brw_query_renderer_string
 940 };
 941
 942 static const struct __DRIrobustnessExtensionRec dri2Robustness = {
 943    { __DRI2_ROBUSTNESS, 1 }
 944 };
 945
 946 static const __DRIextension *intelScreenExtensions[] = {
 947     &intelTexBufferExtension.base,
 948     &intelFlushExtension.base,
 949     &intelImageExtension.base,
 950     &intelRendererQueryExtension.base,
 951     &dri2ConfigQueryExtension.base,
 952     &dri2Robustness.base,
 953     NULL
 954 };
 955
 956 static bool
 957 intel_get_param(__DRIscreen *psp, int param, int *value)
 958 {
 959    int ret;
 960    struct drm_i915_getparam gp;
 961
 962    memset(&gp, 0, sizeof(gp));
 963    gp.param = param;
 964    gp.value = value;
 965
 966    ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
 967    if (ret) {
 968       if (ret != -EINVAL)
 969          _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
 970       return false;
 971    }
 972
 973    return true;
 974 }
 975
 976 static bool
 977 intel_get_boolean(__DRIscreen *psp, int param)
 978 {
 979    int value = 0;
 980    return intel_get_param(psp, param, &value) && value;
 981 }
 982
 983 static void
 984 intelDestroyScreen(__DRIscreen * sPriv)
 985 {
 986    struct intel_screen *intelScreen = sPriv->driverPrivate;
 987
 988    dri_bufmgr_destroy(intelScreen->bufmgr);
 989    driDestroyOptionInfo(&intelScreen->optionCache);
 990
 991    free(intelScreen);
 992    sPriv->driverPrivate = NULL;
 993 }
 994
 995
 996 /**
 997  * This is called when we need to set up GL rendering to a new X window.
 998  */
 999 static GLboolean
1000 intelCreateBuffer(__DRIscreen * driScrnPriv,
1001                   __DRIdrawable * driDrawPriv,
1002                   const struct gl_config * mesaVis, GLboolean isPixmap)
1003 {
1004    struct intel_renderbuffer *rb;
1005    struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
1006    gl_format rgbFormat;
1007    unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
1008    struct gl_framebuffer *fb;
1009
1010    if (isPixmap)
1011       return false;
1012
1013    fb = CALLOC_STRUCT(gl_framebuffer);
1014    if (!fb)
1015       return false;
1016
1017    _mesa_initialize_window_framebuffer(fb, mesaVis);
1018
1019    if (mesaVis->redBits == 5)
1020       rgbFormat = MESA_FORMAT_RGB565;
1021    else if (mesaVis->sRGBCapable)
1022       rgbFormat = MESA_FORMAT_SARGB8;
1023    else if (mesaVis->alphaBits == 0)
1024       rgbFormat = MESA_FORMAT_XRGB8888;
1025    else {
1026       rgbFormat = MESA_FORMAT_SARGB8;
1027       fb->Visual.sRGBCapable = true;
1028    }
1029
1030    /* setup the hardware-based renderbuffers */
1031    rb = intel_create_renderbuffer(rgbFormat, num_samples);
1032    _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
1033
1034    if (mesaVis->doubleBufferMode) {
1035       rb = intel_create_renderbuffer(rgbFormat, num_samples);
1036       _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
1037    }
1038
1039    /*
1040     * Assert here that the gl_config has an expected depth/stencil bit
1041     * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
1042     * which constructs the advertised configs.)
1043     */
1044    if (mesaVis->depthBits == 24) {
1045       assert(mesaVis->stencilBits == 8);
1046
1047       if (screen->devinfo->has_hiz_and_separate_stencil) {
1048          rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
1049                                                 num_samples);
1050          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
1051          rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
1052                                                 num_samples);
1053          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
1054       } else {
1055          /*
1056           * Use combined depth/stencil. Note that the renderbuffer is
1057           * attached to two attachment points.
1058           */
1059          rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
1060                                                 num_samples);
1061          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
1062          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
1063       }
1064    }
1065    else if (mesaVis->depthBits == 16) {
1066       assert(mesaVis->stencilBits == 0);
1067       rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
1068                                              num_samples);
1069       _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
1070    }
1071    else {
1072       assert(mesaVis->depthBits == 0);
1073       assert(mesaVis->stencilBits == 0);
1074    }
1075
1076    /* now add any/all software-based renderbuffers we may need */
1077    _swrast_add_soft_renderbuffers(fb,
1078                                   false, /* never sw color */
1079                                   false, /* never sw depth */
1080                                   false, /* never sw stencil */
1081                                   mesaVis->accumRedBits > 0,
1082                                   false, /* never sw alpha */
1083                                   false  /* never sw aux */ );
1084    driDrawPriv->driverPrivate = fb;
1085
1086    return true;
1087 }
1088
1089 static void
1090 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
1091 {
1092     struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
1093
1094     _mesa_reference_framebuffer(&fb, NULL);
1095 }
1096
1097 static bool
1098 intel_init_bufmgr(struct intel_screen *intelScreen)
1099 {
1100    __DRIscreen *spriv = intelScreen->driScrnPriv;
1101
1102    intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
1103
1104    intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
1105    if (intelScreen->bufmgr == NULL) {
1106       fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
1107               __func__, __LINE__);
1108       return false;
1109    }
1110
1111    drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
1112
1113    if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
1114       fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1115       return false;
1116    }
1117
1118    return true;
1119 }
1120
1121 static bool
1122 intel_detect_swizzling(struct intel_screen *screen)
1123 {
1124    drm_intel_bo *buffer;
1125    unsigned long flags = 0;
1126    unsigned long aligned_pitch;
1127    uint32_t tiling = I915_TILING_X;
1128    uint32_t swizzle_mode = 0;
1129
1130    buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1131                                      64, 64, 4,
1132                                      &tiling, &aligned_pitch, flags);
1133    if (buffer == NULL)
1134       return false;
1135
1136    drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1137    drm_intel_bo_unreference(buffer);
1138
1139    if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1140       return false;
1141    else
1142       return true;
1143 }
1144
1145 static __DRIconfig**
1146 intel_screen_make_configs(__DRIscreen *dri_screen)
1147 {
1148    static const gl_format formats[] = {
1149       MESA_FORMAT_RGB565,
1150       MESA_FORMAT_ARGB8888
1151    };
1152
1153    /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1154    static const GLenum back_buffer_modes[] = {
1155        GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1156    };
1157
1158    static const uint8_t singlesample_samples[1] = {0};
1159    static const uint8_t multisample_samples[2]  = {4, 8};
1160
1161    struct intel_screen *screen = dri_screen->driverPrivate;
1162    const struct brw_device_info *devinfo = screen->devinfo;
1163    uint8_t depth_bits[4], stencil_bits[4];
1164    __DRIconfig **configs = NULL;
1165
1166    /* Generate singlesample configs without accumulation buffer. */
1167    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1168       __DRIconfig **new_configs;
1169       int num_depth_stencil_bits = 2;
1170
1171       /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1172        * buffer that has a different number of bits per pixel than the color
1173        * buffer, gen >= 6 supports this.
1174        */
1175       depth_bits[0] = 0;
1176       stencil_bits[0] = 0;
1177
1178       if (formats[i] == MESA_FORMAT_RGB565) {
1179          depth_bits[1] = 16;
1180          stencil_bits[1] = 0;
1181          if (devinfo->gen >= 6) {
1182              depth_bits[2] = 24;
1183              stencil_bits[2] = 8;
1184              num_depth_stencil_bits = 3;
1185          }
1186       } else {
1187          depth_bits[1] = 24;
1188          stencil_bits[1] = 8;
1189       }
1190
1191       new_configs = driCreateConfigs(formats[i],
1192                                      depth_bits,
1193                                      stencil_bits,
1194                                      num_depth_stencil_bits,
1195                                      back_buffer_modes, 2,
1196                                      singlesample_samples, 1,
1197                                      false);
1198       configs = driConcatConfigs(configs, new_configs);
1199    }
1200
1201    /* Generate the minimum possible set of configs that include an
1202     * accumulation buffer.
1203     */
1204    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1205       __DRIconfig **new_configs;
1206
1207       if (formats[i] == MESA_FORMAT_RGB565) {
1208          depth_bits[0] = 16;
1209          stencil_bits[0] = 0;
1210       } else {
1211          depth_bits[0] = 24;
1212          stencil_bits[0] = 8;
1213       }
1214
1215       new_configs = driCreateConfigs(formats[i],
1216                                      depth_bits, stencil_bits, 1,
1217                                      back_buffer_modes, 1,
1218                                      singlesample_samples, 1,
1219                                      true);
1220       configs = driConcatConfigs(configs, new_configs);
1221    }
1222
1223    /* Generate multisample configs.
1224     *
1225     * This loop breaks early, and hence is a no-op, on gen < 6.
1226     *
1227     * Multisample configs must follow the singlesample configs in order to
1228     * work around an X server bug present in 1.12. The X server chooses to
1229     * associate the first listed RGBA888-Z24S8 config, regardless of its
1230     * sample count, with the 32-bit depth visual used for compositing.
1231     *
1232     * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1233     * supported.  Singlebuffer configs are not supported because no one wants
1234     * them.
1235     */
1236    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1237       if (devinfo->gen < 6)
1238          break;
1239
1240       __DRIconfig **new_configs;
1241       const int num_depth_stencil_bits = 2;
1242       int num_msaa_modes = 0;
1243
1244       depth_bits[0] = 0;
1245       stencil_bits[0] = 0;
1246
1247       if (formats[i] == MESA_FORMAT_RGB565) {
1248          depth_bits[1] = 16;
1249          stencil_bits[1] = 0;
1250       } else {
1251          depth_bits[1] = 24;
1252          stencil_bits[1] = 8;
1253       }
1254
1255       if (devinfo->gen >= 7)
1256          num_msaa_modes = 2;
1257       else if (devinfo->gen == 6)
1258          num_msaa_modes = 1;
1259
1260       new_configs = driCreateConfigs(formats[i],
1261                                      depth_bits,
1262                                      stencil_bits,
1263                                      num_depth_stencil_bits,
1264                                      back_buffer_modes, 1,
1265                                      multisample_samples,
1266                                      num_msaa_modes,
1267                                      false);
1268       configs = driConcatConfigs(configs, new_configs);
1269    }
1270
1271    if (configs == NULL) {
1272       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1273               __LINE__);
1274       return NULL;
1275    }
1276
1277    return configs;
1278 }
1279
1280 static void
1281 set_max_gl_versions(struct intel_screen *screen)
1282 {
1283    __DRIscreen *psp = screen->driScrnPriv;
1284
1285    switch (screen->devinfo->gen) {
1286    case 7:
1287       psp->max_gl_core_version = 33;
1288       psp->max_gl_compat_version = 30;
1289       psp->max_gl_es1_version = 11;
1290       psp->max_gl_es2_version = 30;
1291       break;
1292    case 6:
1293       psp->max_gl_core_version = 31;
1294       psp->max_gl_compat_version = 30;
1295       psp->max_gl_es1_version = 11;
1296       psp->max_gl_es2_version = 30;
1297       break;
1298    case 5:
1299    case 4:
1300       psp->max_gl_core_version = 0;
1301       psp->max_gl_compat_version = 21;
1302       psp->max_gl_es1_version = 11;
1303       psp->max_gl_es2_version = 20;
1304       break;
1305    default:
1306       assert(!"unrecognized intel_screen::gen");
1307       break;
1308    }
1309 }
1310
1311 /**
1312  * This is the driver specific part of the createNewScreen entry point.
1313  * Called when using DRI2.
1314  *
1315  * \return the struct gl_config supported by this driver
1316  */
1317 static const
1318 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1319 {
1320    struct intel_screen *intelScreen;
1321
1322    if (psp->dri2.loader->base.version <= 2 ||
1323        psp->dri2.loader->getBuffersWithFormat == NULL) {
1324       fprintf(stderr,
1325               "\nERROR!  DRI2 loader with getBuffersWithFormat() "
1326               "support required\n");
1327       return false;
1328    }
1329
1330    /* Allocate the private area */
1331    intelScreen = calloc(1, sizeof *intelScreen);
1332    if (!intelScreen) {
1333       fprintf(stderr, "\nERROR!  Allocating private area failed\n");
1334       return false;
1335    }
1336    /* parse information in __driConfigOptions */
1337    driParseOptionInfo(&intelScreen->optionCache, brw_config_options.xml);
1338
1339    intelScreen->driScrnPriv = psp;
1340    psp->driverPrivate = (void *) intelScreen;
1341
1342    if (!intel_init_bufmgr(intelScreen))
1343        return false;
1344
1345    intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1346    intelScreen->devinfo = brw_get_device_info(intelScreen->deviceID);
1347
1348    intelScreen->hw_must_use_separate_stencil = intelScreen->devinfo->gen >= 7;
1349
1350    intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1351
1352    set_max_gl_versions(intelScreen);
1353
1354    psp->extensions = intelScreenExtensions;
1355
1356    return (const __DRIconfig**) intel_screen_make_configs(psp);
1357 }
1358
1359 struct intel_buffer {
1360    __DRIbuffer base;
1361    struct intel_region *region;
1362 };
1363
1364 static __DRIbuffer *
1365 intelAllocateBuffer(__DRIscreen *screen,
1366                     unsigned attachment, unsigned format,
1367                     int width, int height)
1368 {
1369    struct intel_buffer *intelBuffer;
1370    struct intel_screen *intelScreen = screen->driverPrivate;
1371
1372    assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1373           attachment == __DRI_BUFFER_BACK_LEFT);
1374
1375    intelBuffer = calloc(1, sizeof *intelBuffer);
1376    if (intelBuffer == NULL)
1377       return NULL;
1378
1379    /* The front and back buffers are color buffers, which are X tiled. */
1380    intelBuffer->region = intel_region_alloc(intelScreen,
1381                                             I915_TILING_X,
1382                                             format / 8,
1383                                             width,
1384                                             height,
1385                                             true);
1386
1387    if (intelBuffer->region == NULL) {
1388            free(intelBuffer);
1389            return NULL;
1390    }
1391
1392    intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1393
1394    intelBuffer->base.attachment = attachment;
1395    intelBuffer->base.cpp = intelBuffer->region->cpp;
1396    intelBuffer->base.pitch = intelBuffer->region->pitch;
1397
1398    return &intelBuffer->base;
1399 }
1400
1401 static void
1402 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1403 {
1404    struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1405
1406    intel_region_release(&intelBuffer->region);
1407    free(intelBuffer);
1408 }
1409
1410
1411 static const struct __DriverAPIRec brw_driver_api = {
1412    .InitScreen           = intelInitScreen2,
1413    .DestroyScreen        = intelDestroyScreen,
1414    .CreateContext        = brwCreateContext,
1415    .DestroyContext       = intelDestroyContext,
1416    .CreateBuffer         = intelCreateBuffer,
1417    .DestroyBuffer        = intelDestroyBuffer,
1418    .MakeCurrent          = intelMakeCurrent,
1419    .UnbindContext        = intelUnbindContext,
1420    .AllocateBuffer       = intelAllocateBuffer,
1421    .ReleaseBuffer        = intelReleaseBuffer
1422 };
1423
1424 static const struct __DRIDriverVtableExtensionRec brw_vtable = {
1425    .base = { __DRI_DRIVER_VTABLE, 1 },
1426    .vtable = &brw_driver_api,
1427 };
1428
1429 static const __DRIextension *brw_driver_extensions[] = {
1430     &driCoreExtension.base,
1431     &driDRI2Extension.base,
1432     &brw_vtable.base,
1433     &brw_config_options.base,
1434     NULL
1435 };
1436
1437 PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void)
1438 {
1439    globalDriverAPI = &brw_driver_api;
1440
1441    return brw_driver_extensions;
1442 }