661060f63c7c8c0eee032161648e288d8fae8d6a
1 # ================================== Steps to add peripherals ============
2 # Step-1: create interface declaration for the peripheral to be added.
3 # Remember these are interfaces defined for the pinmux and hence
4 # will be opposite to those defined at the peripheral.
5 # For eg. the output TX from the UART will be input (method Action)
7 # These changes will have to be done in interface_decl.py
8 # Step-2 define the wires that will be required to transfer data from the
9 # peripheral interface to the IO cell and vice-versa. Create a
10 # mkDWire for each input/output between the peripheral and the
11 # pinmux. Also create an implicit wire of GenericIOType for each cell
12 # that can be connected to a each bit from the peripheral.
13 # These changes will have to be done in wire_def.py
14 # Step-3: create the definitions for each of the methods defined above.
15 # These changes will have to be done in interface_decl.py
16 # ========================================================================
18 # default module imports
26 # project module imports
27 from interface_decl
import Interfaces
, mux_interface
, io_interface
28 from parse
import Parse
29 from actual_pinmux
import init
30 from bus_transactors
import axi4_lite
34 This BSV file has been generated by the PinMux tool available at:
35 https://bitbucket.org/casl/pinmux.
37 Authors: Neel Gala, Luke
38 Date of generation: ''' + time
.strftime("%c") + '''
41 header
= copyright
+ '''
45 Bit#(1) outputval; // output from core to pad bit7
46 Bit#(1) output_en; // output enable from core to pad bit6
47 Bit#(1) input_en; // input enable from core to io_cell bit5
48 Bit#(1) pullup_en; // pullup enable from core to io_cell bit4
49 Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3
50 Bit#(1) drivestrength; // drivestrength from core to io_cell bit2
51 Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1
52 Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0
53 } GenericIOType deriving(Eq,Bits,FShow);
63 def pinmuxgen(pth
=None, verify
=True):
64 """ populating the file with the code
67 p
= Parse(pth
, verify
)
69 ifaces
= Interfaces(pth
)
70 ifaces
.ifaceadd('io', p
.N_IO
, io_interface
, 0)
74 bp
= os
.path
.join(pth
, bp
)
75 if not os
.path
.exists(bp
):
78 pmp
= os
.path
.join(bp
, 'pinmux.bsv')
79 ptp
= os
.path
.join(bp
, 'PinTop.bsv')
80 bvp
= os
.path
.join(bp
, 'bus.bsv')
82 # package and interface declaration followed by
83 # the generic io_cell definition
84 with
open(pmp
, "w") as bsv_file
:
85 bsv_file
.write(header
)
88 interface MuxSelectionLines;
90 // declare the method which will capture the user pin-mux
91 // selection values.The width of the input is dependent on the number
92 // of muxes happening per IO. For now we have a generalized width
93 // where each IO will have the same number of muxes.''')
95 for cell
in p
.muxed_cells
:
96 cnum
= int(math
.log(len(cell
) - 1, 2))
97 bsv_file
.write(mux_interface
.ifacefmt(cell
[0], cnum
))
102 interface PeripheralSide;
103 // declare the interface to the IO cells.
104 // Each IO cell will have 8 input field (output from pin mux
105 // and on output field (input to pinmux)''')
106 # ==============================================================
108 # == create method definitions for all peripheral interfaces ==#
109 ifaces
.ifacefmt(bsv_file
)
111 # ==============================================================
113 # ===== finish interface definition and start module definition=======
117 interface Ifc_pinmux;
118 interface MuxSelectionLines mux_lines;
119 interface PeripheralSide peripheral_side;
122 module mkpinmux(Ifc_pinmux);
124 # ====================================================================
126 # ======================= create wire and registers =================#
128 // the followins wires capture the pin-mux selection
129 // values for each mux assigned to a CELL
131 for cell
in p
.muxed_cells
:
132 bsv_file
.write(mux_interface
.wirefmt(
133 cell
[0], int(math
.log(len(cell
) - 1, 2))))
135 ifaces
.wirefmt(bsv_file
)
138 # ====================================================================
139 # ========================= Actual pinmuxing ========================#
141 /*====== This where the muxing starts for each io-cell======*/
143 bsv_file
.write(p
.pinmux
)
145 /*============================================================*/
147 # ====================================================================
148 # ================= interface definitions for each method =============#
150 interface mux_lines = interface MuxSelectionLines
152 for cell
in p
.muxed_cells
:
153 bsv_file
.write(mux_interface
.ifacedef(cell
[0],
154 int(math
.log(len(cell
) - 1, 2))))
157 interface peripheral_side = interface PeripheralSide
159 ifaces
.ifacedef(bsv_file
)
160 bsv_file
.write(footer
)
161 print("BSV file successfully generated: bsv_src/pinmux.bsv")
162 # ======================================================================
164 with
open(ptp
, 'w') as bsv_file
:
165 bsv_file
.write(copyright
+ '''
168 interface Ifc_PintTop;
169 method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data);
170 method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr);
171 interface PeripheralSide peripheral_side;
174 module mkPinTop(Ifc_PintTop);
175 // instantiate the pin-mux module here
176 Ifc_pinmux pinmux <-mkpinmux;
178 // declare the registers which will be used to mux the IOs
179 '''.format(p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
181 for cell
in p
.muxed_cells
:
183 Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format(
184 int(math
.log(len(cell
) - 1, 2)), cell
[0]))
187 // rule to connect the registers to the selection lines of the
189 rule connect_selection_registers;''')
191 for cell
in p
.muxed_cells
:
193 pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell
[0]))
197 // method definitions for the write user interface
198 method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data);
200 case (addr[{0}:{1}])'''.format(p
.upper_offset
, p
.lower_offset
,
201 p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
203 for cell
in p
.muxed_cells
:
205 {0}: rg_muxio_{1}<=truncate(data);'''.format(index
, cell
[0]))
215 // method definitions for the read user interface
216 method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr);
219 case (addr[{0}:{1}])'''.format(p
.upper_offset
, p
.lower_offset
,
220 p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
222 for cell
in p
.muxed_cells
:
224 {0}: data=zeroExtend(rg_muxio_{1});'''.format(index
, cell
[0]))
230 return tuple2(err,data);
232 interface peripheral_side=pinmux.peripheral_side;
237 # ######## Generate bus transactors ################
238 with
open(bvp
, 'w') as bsv_file
:
239 bsv_file
.write(axi4_lite
.format(p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
240 # ##################################################
244 print ('''pinmux_generator.py [-o outputdir] [-v|--validate] [-h|--help]
245 -o outputdir : defaults to bsv_src. also location for reading pinmux.txt
246 interfaces.txt and *.txt
247 -v | --validate : runs some validation on the pinmux
248 -h | --help : this help message
252 if __name__
== '__main__':
254 options
, remainder
= getopt
.getopt(
262 except getopt
.GetoptError
as err
:
263 print "ERROR: %s" % str(err
)
269 for opt
, arg
in options
:
270 if opt
in ('-o', '--output'):
272 elif opt
in ('-v', '--validate'):
274 elif opt
in ('-h', '--help'):
278 pinmuxgen(output_dir
, validate
)