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last changeMon, 30 Nov 2020 15:00:41 +0000 (15:00 +0000)

Steps to generate custom pinmux.bsv :

1 . Let's say that the pinmap which we wish to implement is : sample_pinmap

The default order for UART and SPI with pinmux repository is : * UART : tx -> rx * MSPI: ck -> nss -> io0 -> io1 After generating minitest, this order can be observed in uart.txt, mspi.txt, etc.

2 . We will rearrange the order of pins of our pinmap to confine to default order : After reordering, it will look like: correct_order

  1. How to specify this table to generate pinmux.bsv? In pinmux repository, we write the specifications in 'src/spec' directory, like default For this case, we will simply modify original to suit our table.

    • We have only one bank here with 16 rows. So : 'A' : (16,4) in pinbanks.
    • In function names, keep only the one which are present in table and update the id as per table.
    • Specifying entry in the table: 1) ps.gpio("" , ('A', 12) , 0 , 7 , 2 ) There are 5 arguments passed. 2nd argument specifies bank and pin number. 3rd entry specifies the mux select line (which column?). 4th entry specifies the GPIO id. 5th entry specifies the collection of entries. Here, this will reflect to (GPIOA A7) at pin number 12, and (GPIOA A8) at pin number 13.

    2) ps.mspi("2", ('A', 7), 1) There are 4 arguments passed. 1st argument specifies the id of MSPI. 2nd argument specifies the bank and pin number. 3rd argument specifies the mux selection line. Here this will reflect as: pin number mux1 7 A MSPI2 CK 8 A MSPI2 NSS 9 A MSPI2 IO0 10 A MSPI2 IO1

    3) ps.uart(" 3 ", ( 'A', 2 ) , 1 ) Here, argument meaning is same as (2)

    4) ps.pwm("" , ('A', 10) , 2 , 5 , 1 ) Here, argument meaning is same as (1)

The complete python file for this table is : src/spec/ . Original minitest: src/spec/

2020-11-30 Luke Kenneth... whoops invert vss/vdd power/ground by mistake master
2020-11-13 Luke Kenneth... rename ls180 pllock signal
2020-11-13 Luke Kenneth... rename pll_48_o to pll_18_o in ls180 spec
2020-11-11 Luke Kenneth... remove extraneous debug prints
2020-11-11 Luke Kenneth... extend sys_clk pad name
2020-11-11 Luke Kenneth... explicitly add sys_clk pad
2020-11-11 Luke Kenneth... power and ground have to be named power and ground
2020-11-11 Luke Kenneth... rename ls180 (io)vdd/vss pads
2020-11-11 Luke Kenneth... add not-connected pads to ls180
2020-11-11 Luke Kenneth... explicit add of sys pll lock to ls180
2020-11-11 Luke Kenneth... explicit add of sys pll lock to ls180
2020-11-11 Luke Kenneth... missing domain indicator, which removed EINT and PWM...
2020-11-10 Luke Kenneth... move sys group over to opposite south corner
2020-11-10 Luke Kenneth... PLL sys group has 2 select lines and PLL Lock out
2020-11-07 Luke Kenneth... really laborious way of getting the direction of the...
2020-11-06 Luke Kenneth... reference correct pads for sl180 pwm
3 months ago master