src/python/m5/simulate.py

   1 # Copyright (c) 2005 The Regents of The University of Michigan
   2 # All rights reserved.
   3 #
   4 # Redistribution and use in source and binary forms, with or without
   5 # modification, are permitted provided that the following conditions are
   6 # met: redistributions of source code must retain the above copyright
   7 # notice, this list of conditions and the following disclaimer;
   8 # redistributions in binary form must reproduce the above copyright
   9 # notice, this list of conditions and the following disclaimer in the
  10 # documentation and/or other materials provided with the distribution;
  11 # neither the name of the copyright holders nor the names of its
  12 # contributors may be used to endorse or promote products derived from
  13 # this software without specific prior written permission.
  14 #
  15 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26 #
  27 # Authors: Nathan Binkert
  28 #          Steve Reinhardt
  29
  30 import atexit
  31 import os
  32 import sys
  33
  34 # import the SWIG-wrapped main C++ functions
  35 import internal
  36 from main import options
  37 import SimObject
  38 import ticks
  39
  40 # The final hook to generate .ini files.  Called from the user script
  41 # once the config is built.
  42 def instantiate(root):
  43     # we need to fix the global frequency
  44     ticks.fixGlobalFrequency()
  45
  46     root.unproxy_all()
  47     # ugly temporary hack to get output to config.ini
  48     sys.stdout = file(os.path.join(options.outdir, 'config.ini'), 'w')
  49     root.print_ini()
  50     sys.stdout.close() # close config.ini
  51     sys.stdout = sys.__stdout__ # restore to original
  52
  53     # Initialize the global statistics
  54     internal.stats.initSimStats()
  55
  56     # Create the C++ sim objects and connect ports
  57     root.createCCObject()
  58     root.connectPorts()
  59
  60     # Do a second pass to finish initializing the sim objects
  61     internal.sim_object.initAll()
  62
  63     # Do a third pass to initialize statistics
  64     internal.sim_object.regAllStats()
  65
  66     # Check to make sure that the stats package is properly initialized
  67     internal.stats.check()
  68
  69     # Reset to put the stats in a consistent state.
  70     internal.stats.reset()
  71
  72 def doDot(root):
  73     dot = pydot.Dot()
  74     instance.outputDot(dot)
  75     dot.orientation = "portrait"
  76     dot.size = "8.5,11"
  77     dot.ranksep="equally"
  78     dot.rank="samerank"
  79     dot.write("config.dot")
  80     dot.write_ps("config.ps")
  81
  82 need_resume = []
  83 need_startup = True
  84 def simulate(*args, **kwargs):
  85     global need_resume, need_startup
  86
  87     if need_startup:
  88         internal.core.SimStartup()
  89         need_startup = False
  90
  91     for root in need_resume:
  92         resume(root)
  93     need_resume = []
  94
  95     return internal.event.simulate(*args, **kwargs)
  96
  97 # Export curTick to user script.
  98 def curTick():
  99     return internal.core.cvar.curTick
 100
 101 # Python exit handlers happen in reverse order.  We want to dump stats last.
 102 atexit.register(internal.stats.dump)
 103
 104 # register our C++ exit callback function with Python
 105 atexit.register(internal.core.doExitCleanup)
 106
 107 # This loops until all objects have been fully drained.
 108 def doDrain(root):
 109     all_drained = drain(root)
 110     while (not all_drained):
 111         all_drained = drain(root)
 112
 113 # Tries to drain all objects.  Draining might not be completed unless
 114 # all objects return that they are drained on the first call.  This is
 115 # because as objects drain they may cause other objects to no longer
 116 # be drained.
 117 def drain(root):
 118     all_drained = False
 119     drain_event = internal.event.createCountedDrain()
 120     unready_objects = root.startDrain(drain_event, True)
 121     # If we've got some objects that can't drain immediately, then simulate
 122     if unready_objects > 0:
 123         drain_event.setCount(unready_objects)
 124         simulate()
 125     else:
 126         all_drained = True
 127     internal.event.cleanupCountedDrain(drain_event)
 128     return all_drained
 129
 130 def resume(root):
 131     root.resume()
 132
 133 def checkpoint(root, dir):
 134     if not isinstance(root, objects.Root):
 135         raise TypeError, "Checkpoint must be called on a root object."
 136     doDrain(root)
 137     print "Writing checkpoint"
 138     internal.sim_object.serializeAll(dir)
 139     resume(root)
 140
 141 def restoreCheckpoint(root, dir):
 142     print "Restoring from checkpoint"
 143     internal.sim_object.unserializeAll(dir)
 144     need_resume.append(root)
 145
 146 def changeToAtomic(system):
 147     if not isinstance(system, (objects.Root, objects.System)):
 148         raise TypeError, "Parameter of type '%s'.  Must be type %s or %s." % \
 149               (type(system), objects.Root, objects.System)
 150     if system.getMemoryMode() != internal.sim_object.SimObject.Atomic:
 151         doDrain(system)
 152         print "Changing memory mode to atomic"
 153         system.changeTiming(internal.sim_object.SimObject.Atomic)
 154
 155 def changeToTiming(system):
 156     if not isinstance(system, (objects.Root, objects.System)):
 157         raise TypeError, "Parameter of type '%s'.  Must be type %s or %s." % \
 158               (type(system), objects.Root, objects.System)
 159
 160     if system.getMemoryMode() != internal.sim_object.SimObject.Timing:
 161         doDrain(system)
 162         print "Changing memory mode to timing"
 163         system.changeTiming(internal.sim_object.SimObject.Timing)
 164
 165 def switchCpus(cpuList):
 166     print "switching cpus"
 167     if not isinstance(cpuList, list):
 168         raise RuntimeError, "Must pass a list to this function"
 169     for i in cpuList:
 170         if not isinstance(i, tuple):
 171             raise RuntimeError, "List must have tuples of (oldCPU,newCPU)"
 172
 173     [old_cpus, new_cpus] = zip(*cpuList)
 174
 175     for cpu in old_cpus:
 176         if not isinstance(cpu, objects.BaseCPU):
 177             raise TypeError, "%s is not of type BaseCPU" % cpu
 178     for cpu in new_cpus:
 179         if not isinstance(cpu, objects.BaseCPU):
 180             raise TypeError, "%s is not of type BaseCPU" % cpu
 181
 182     # Drain all of the individual CPUs
 183     drain_event = internal.event.createCountedDrain()
 184     unready_cpus = 0
 185     for old_cpu in old_cpus:
 186         unready_cpus += old_cpu.startDrain(drain_event, False)
 187     # If we've got some objects that can't drain immediately, then simulate
 188     if unready_cpus > 0:
 189         drain_event.setCount(unready_cpus)
 190         simulate()
 191     internal.event.cleanupCountedDrain(drain_event)
 192     # Now all of the CPUs are ready to be switched out
 193     for old_cpu in old_cpus:
 194         old_cpu._ccObject.switchOut()
 195     index = 0
 196     for new_cpu in new_cpus:
 197         new_cpu.takeOverFrom(old_cpus[index])
 198         new_cpu._ccObject.resume()
 199         index += 1