fdbe8659583b01a2073db5e01aae137c965286fa
[soc.git] / src / soc / fu / div / core_stages.py
1 # This stage is the setup stage that converts the inputs
2 # into the values expected by DivPipeCore
3
4 from nmigen import (Module, Signal, Cat, Repl, Mux, Const, Array)
5 from nmutil.pipemodbase import PipeModBase
6 from ieee754.part.partsig import PartitionedSignal
7 from soc.decoder.power_enums import InternalOp
8
9 from soc.decoder.power_fields import DecodeFields
10 from soc.decoder.power_fieldsn import SignalBitRange
11 from soc.fu.div.pipe_data import (CoreInputData,
12 CoreInterstageData,
13 CoreOutputData)
14 from ieee754.div_rem_sqrt_rsqrt.core import (DivPipeCoreSetupStage,
15 DivPipeCoreCalculateStage,
16 DivPipeCoreFinalStage)
17
18 __all__ = ["DivCoreBaseStage", "DivCoreSetupStage",
19 "DivCoreCalculateStage", "DivCoreFinalStage"]
20
21
22 class DivCoreBaseStage(PipeModBase):
23 def __init__(self, pspec, modname, core_class, *args, **kwargs):
24 super().__init__(pspec, modname)
25 self.core = core_class(pspec.core_config, *args, **kwargs)
26
27 def elaborate(self, platform):
28 m = Module()
29
30 m.d.comb += self.o.eq_without_core(self.i)
31
32 m.submodules.core = self.core
33
34 m.d.comb += self.core.i.eq(self.i.core)
35 m.d.comb += self.o.core.eq(self.core.o)
36
37 return m
38
39
40 class DivCoreSetupStage(DivCoreBaseStage):
41 def __init__(self, pspec):
42 super().__init__(pspec, "core_setup_stage", DivPipeCoreSetupStage)
43
44 def ispec(self):
45 return CoreInputData(self.pspec)
46
47 def ospec(self):
48 return CoreInterstageData(self.pspec)
49
50
51 class DivCoreCalculateStage(DivCoreBaseStage):
52 def __init__(self, pspec, stage_index):
53 super().__init__(pspec, f"core_calculate_stage_{stage_index}",
54 DivPipeCoreCalculateStage, stage_index)
55
56 def ispec(self):
57 return CoreInterstageData(self.pspec)
58
59 def ospec(self):
60 return CoreInterstageData(self.pspec)
61
62
63 class DivCoreFinalStage(DivCoreBaseStage):
64 def __init__(self, pspec):
65 super().__init__(pspec, "core_final_stage", DivPipeCoreFinalStage)
66
67 def ispec(self):
68 return CoreInterstageData(self.pspec)
69
70 def ospec(self):
71 return CoreOutputData(self.pspec)