b68e0739ecdc3d53aa31584941824024108560be
2 def __init__(self
, program
, name
, regs
=None, sprs
=None, cr
=0, mem
=None,
22 def set_int_ra(alu
, dec2
, inp
):
24 yield alu
.p
.data_i
.ra
.eq(inp
['ra'])
26 yield alu
.p
.data_i
.ra
.eq(0)
28 def set_int_rb(alu
, dec2
, inp
):
29 yield alu
.p
.data_i
.rb
.eq(0)
31 yield alu
.p
.data_i
.rb
.eq(inp
['rb'])
32 # If there's an immediate, set the B operand to that
33 imm_ok
= yield dec2
.e
.imm_data
.imm_ok
35 data2
= yield dec2
.e
.imm_data
.imm
36 yield alu
.p
.data_i
.rb
.eq(data2
)
38 def set_int_rc(alu
, dec2
, inp
):
40 yield alu
.p
.data_i
.rc
.eq(inp
['rc'])
42 yield alu
.p
.data_i
.rc
.eq(0)
44 def set_xer_ca(alu
, dec2
, inp
):
46 yield alu
.p
.data_i
.xer_ca
.eq(inp
['xer_ca'])
47 print ("extra inputs: CA/32", bin(inp
['xer_ca']))
49 def set_xer_so(alu
, dec2
, inp
):
52 print ("extra inputs: so", so
)
53 yield alu
.p
.data_i
.xer_so
.eq(so
)
55 def set_fast_cia(alu
, dec2
, inp
):
57 yield alu
.p
.data_i
.cia
.eq(inp
['cia'])
59 def set_fast_spr1(alu
, dec2
, inp
):
61 yield alu
.p
.data_i
.spr1
.eq(inp
['spr1'])
63 def set_fast_spr2(alu
, dec2
, inp
):
65 yield alu
.p
.data_i
.spr2
.eq(inp
['spr2'])
67 def set_cr_a(alu
, dec2
, inp
):
69 yield alu
.p
.data_i
.cr_a
.eq(inp
['cr_a'])
71 def set_cr_b(alu
, dec2
, inp
):
73 yield alu
.p
.data_i
.cr_b
.eq(inp
['cr_b'])
75 def set_cr_c(alu
, dec2
, inp
):
77 yield alu
.p
.data_i
.cr_c
.eq(inp
['cr_c'])
79 def set_full_cr(alu
, dec2
, inp
):
81 yield alu
.p
.data_i
.full_cr
.eq(inp
['full_cr'])
83 yield alu
.p
.data_i
.full_cr
.eq(0)