-#define SV_LOAD_FORMAT_OFFSET(load_instruction, testdata, elwidth) \
- load_instruction( x12, testdata, 0); \
- load_instruction( x13, testdata+elwidth, 0); \
- load_instruction( x14, testdata+elwidth*2, 0); \
- load_instruction( x15, testdata+elwidth*3, 0); \
- load_instruction( x16, testdata+elwidth*4, 0); \
- load_instruction( x17, testdata+elwidth*5, 0); \
-
-#define SV_ELWIDTH_TEST(code, load_instruction, testdata, elwidth, \
- vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \
- expect1, expect2, expect3 ) \
- \
- SV_ELWIDTH_TEST_INNER(SV_LOAD_FORMAT_OFFSET(load_instruction, testdata, elwidth), \
- vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \
- expect1, expect2, expect3, code x28, x15, x12) \
-
+// Loads the source registers using load_instruction from testdata with a spacing of elwidth and offset
+#define SV_LOAD_FORMAT_OFFSET(load_instruction, testdata, elwidth, offset) \
+ load_instruction( x12, testdata, offset); \
+ load_instruction( x13, testdata+elwidth, offset); \
+ load_instruction( x14, testdata+elwidth*2, offset); \
+ load_instruction( x15, testdata+elwidth*3, offset); \
+ load_instruction( x16, testdata+elwidth*4, offset); \
+ load_instruction( x17, testdata+elwidth*5, offset); \
+
+// This should be used in all cases where three parameters are formed with an instruction
+// IE addw x28, x15, x12 will be generated
+#define SV_ELWIDTH_TEST(code, load_instruction, testdata, elwidth, offset, \
+ vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \
+ expect1, expect2, expect3 ) \
+ \
+ SV_ELWIDTH_TEST_INNER(SV_LOAD_FORMAT_OFFSET(load_instruction, testdata, elwidth, offset), \
+ vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \
+ expect1, expect2, expect3, code x28, x15, x12) \
+
+// This should be used in all cases where two parameters are formed with an instruction
+// IE ld x28 (0)x12 will be generated