+ - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
+ - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
+ - donated
+ - parent #198
+ - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
+ - MultiCompUnit (and Function Units) proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
+ - donated
+ - parent #195
+
+## Completed but not yet submitted:
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
+ - Project 2019-10-043 06dec2020 wishbone
+ - EUR 0 (TBD)
+
+### Project 2019-10-029 14mar2020 coriolis2
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
+ - (total EUR 100 shared 50% with staf)
+ - EUR 50 lkcl
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
+ - (total EUR 1500 shared 50% with LIP6)
+ - EUR 750 lkcl
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
+ - (total EUR 400 shared 75% with LIP6)
+ - EUR 300 lkcl
+
+### Project 2019-02-012 06dec2020 Core
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
+ - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
+ - EUR 750 donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
+ - EUR 1500
+
+### Project 2019-10-043 06dec2020 wishbone
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
+ - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300