+ // This code uses a modified Duff's Device to improve the performance
+ // of executing instructions. While typical Duff's Devices are used
+ // for software pipelining, the switch statement below primarily
+ // benefits from separate call points for the fetch.func function call
+ // found in each execute_insn. This function call is an indirect jump
+ // that depends on the current instruction. By having an indirect jump
+ // dedicated for each icache entry, you improve the performance of the
+ // host's next address predictor. Each case in the switch statement
+ // allows for the program flow to contine to the next case if it
+ // corresponds to the next instruction in the program and instret is
+ // still less than n.
+ //
+ // According to Andrew Waterman's recollection, this optimization
+ // resulted in approximately a 2x performance increase.
+ //
+ // If there is support for compressed instructions, the mmu and the
+ // switch statement get more complicated. Each branch target is stored
+ // in the index corresponding to mmu->icache_index(), but consecutive
+ // non-branching instructions are stored in consecutive indices even if
+ // mmu->icache_index() specifies a different index (which is the case
+ // for 32-bit instructions in the presence of compressed instructions).
+
+ // This figures out where to jump to in the switch statement