-----------------------------
We assume that the RISCV environment variable is set to the RISC-V tools
-install path, and that the riscv-gcc package is installed.
+install path, and that the riscv-gnu-toolchain package is installed.
- $ git clone https://github.com/ucb-bar/riscv-tests
+ $ git clone https://github.com/riscv/riscv-tests
$ cd riscv-tests
$ git submodule update --init --recursive
$ autoconf
The `rv32ui` and `rv64ui` TVMs are integer-only subsets of `rv32u` and `rv64u`
respectively. These subsets can not use any floating-point instructions (major
opcodes: LOAD-FP, STORE-FP, MADD, MSUB, NMSUB, NMADD, OP-FP), and hence cannot
-access the floating-point register state (f0รข-f31 and fsr). The integer-only
+access the floating-point register state (f0-f31 and fsr). The integer-only
TVMs are useful for initial processor bringup and to test simpler
implementations that lack a hardware FPU.