IOType.InTriOut: 3,
}
length = sum(connlength[conn._iotype] for conn in self._ios)
+ if length == 0:
+ return self.bus.tdi
io_sr = Signal(length)
io_bd = Signal(length)
return io_sr[-1]
-
def add_shiftreg(self, *, ircode, length, domain="sync", name=None, src_loc_at=0):
"""Add a shift register to the JTAG interface