Propogate the reset call to the extensions as well. Add reset function to extensions...

[riscv-isa-sim.git] / config.h.in

diff --git a/config.h.in b/config.h.in
index 28d57d273366a9c2c66dc210710a9e2f30d7e7ce..cac46554b85fb0afb69a80c11728278ed5665183 100644 (file)
--- a/config.h.in
+++ b/config.h.in
@@ -30,15 +30,12 @@
 /* Define if 64-bit mode is supported */
 #undef RISCV_ENABLE_64BIT
 
+/* Enable commit log generation */
+#undef RISCV_ENABLE_COMMITLOG
+
 /* Define if floating-point instructions are supported */
 #undef RISCV_ENABLE_FPU
 
-/* Define if instruction compression is supported */
-#undef RISCV_ENABLE_RVC
-
-/* Define if vector processor is supported */
-#undef RISCV_ENABLE_VEC
-
 /* Define if subproject MCPPBS_SPROJ_NORM is enabled */
 #undef SOFTFLOAT_ENABLED