Propogate the reset call to the extensions as well. Add reset function to extensions...

[riscv-isa-sim.git] / config.h.in

diff --git a/config.h.in b/config.h.in
index cf21aff58e97c497ee7cc96ffbc764494b1601df..cac46554b85fb0afb69a80c11728278ed5665183 100644 (file)
--- a/config.h.in
+++ b/config.h.in
@@ -1,5 +1,11 @@
 /* config.h.in.  Generated from configure.ac by autoheader.  */
 
+/* Define to 1 if you have the `fesvr' library (-lfesvr). */
+#undef HAVE_LIBFESVR
+
+/* Define to 1 if you have the `pthread' library (-lpthread). */
+#undef HAVE_LIBPTHREAD
+
 /* Define to the address where bug reports for this package should be sent. */
 #undef PACKAGE_BUGREPORT
 
@@ -24,21 +30,12 @@
 /* Define if 64-bit mode is supported */
 #undef RISCV_ENABLE_64BIT
 
+/* Enable commit log generation */
+#undef RISCV_ENABLE_COMMITLOG
+
 /* Define if floating-point instructions are supported */
 #undef RISCV_ENABLE_FPU
 
-/* Define if instruction cache simulator is enabled */
-#undef RISCV_ENABLE_ICSIM
-
-/* Define if instruction compression is supported */
-#undef RISCV_ENABLE_RVC
-
-/* Define if vector processor is supported */
-#undef RISCV_ENABLE_VEC
-
-/* Define if libopcodes exists */
-#undef RISCV_HAVE_LIBOPCODES
-
 /* Define if subproject MCPPBS_SPROJ_NORM is enabled */
 #undef SOFTFLOAT_ENABLED