change hwacha cause to follow risc-v cause

[riscv-isa-sim.git] / hwacha / hwacha.h

diff --git a/hwacha/hwacha.h b/hwacha/hwacha.h
index e48bf529cd2488c5fe8173800e637d4cfe9f3e7a..8b27f966781bdb5381e661d1ee9b477b887a670e 100644 (file)
--- a/hwacha/hwacha.h
+++ b/hwacha/hwacha.h
@@ -11,11 +11,10 @@ struct ct_state_t
   uint32_t nfpr;
   uint32_t maxvl;
   uint32_t vl;
+  uint32_t count;
+  uint32_t prec;
 
   reg_t vf_pc;
-
-  reg_t cause;
-  reg_t aux;
 };
 
 struct ut_state_t
@@ -30,22 +29,34 @@ struct ut_state_t
 class hwacha_t : public extension_t
 {
 public:
+  hwacha_t() : cause(0), aux(0), debug(false) {}
   std::vector<insn_desc_t> get_instructions();
+  std::vector<disasm_insn_t*> get_disasms();
   const char* name() { return "hwacha"; }
   void reset();
+  void set_debug(bool value) { debug = value; }
 
   ct_state_t* get_ct_state() { return &ct_state; }
   ut_state_t* get_ut_state(int idx) { return &ut_state[idx]; }
   bool vf_active();
+  reg_t get_cause() { return cause; }
+  reg_t get_aux() { return aux; }
   void take_exception(reg_t, reg_t);
   void clear_exception() { clear_interrupt(); }
 
-private:
+  bool get_debug() { return debug; }
+  disassembler_t* get_ut_disassembler() { return &ut_disassembler; }
+
   static const int max_uts = 2048;
+
+private:
   ct_state_t ct_state;
   ut_state_t ut_state[max_uts];
-};
+  reg_t cause;
+  reg_t aux;
 
-REGISTER_EXTENSION(hwacha, []() { return new hwacha_t; })
+  disassembler_t ut_disassembler;
+  bool debug;
+};
 
 #endif