split out S-mode tests and M-mode tests

[riscv-tests.git] / isa / rv32mi / csr.S

diff --git a/isa/rv32mi/csr.S b/isa/rv32mi/csr.S
new file mode 100644 (file)
index 0000000..6361f86
--- /dev/null
+++ b/isa/rv32mi/csr.S
@@ -0,0 +1,8 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64S
+#define RVTEST_RV64S RVTEST_RV32M
+#define __MACHINE_MODE
+
+#include "../rv64si/csr.S"