Clear triggers during entry.

[riscv-tests.git] / isa / rv32si / Makefrag

diff --git a/isa/rv32si/Makefrag b/isa/rv32si/Makefrag
index dea3ecf4b28347a521c985b92a7854033a47a958..f4237883d20e3d183e9db34c7c7d5a9e948f8e4f 100644 (file)
--- a/isa/rv32si/Makefrag
+++ b/isa/rv32si/Makefrag
@@ -4,9 +4,11 @@
 
 rv32si_sc_tests = \
        csr \
+       dirty \
        ma_fetch \
        scall \
        sbreak \
+       wfi \
 
 rv32si_p_tests = $(addprefix rv32si-p-, $(rv32si_sc_tests))