Add an RVC test

[riscv-tests.git] / isa / rv64mi / breakpoint.S

diff --git a/isa/rv64mi/breakpoint.S b/isa/rv64mi/breakpoint.S
index 77c9509c4e5f0d8ceb95c683271b5054dde27905..b975331d58ff6e6ccb3c99ed42d3c4b3d534e5f0 100644 (file)
--- a/isa/rv64mi/breakpoint.S
+++ b/isa/rv64mi/breakpoint.S
@@ -36,9 +36,10 @@ RVTEST_CODE_BEGIN
   csrr a1, tdrdata1
   andi a1, a1, 0x7ff
   bne a0, a1, 2f
+  .align 2
 1:
   # Trap handler should skip this instruction.
-  j fail
+  beqz x0, fail
 
   # Make sure reads don't trap.
   li TESTNUM, 3