Make WFI test more strict

[riscv-tests.git] / isa / rv64mi / timer.S

diff --git a/isa/rv64mi/timer.S b/isa/rv64mi/timer.S
index f3350fc6ae51c696bd8edff528835689bc47384a..4697793baf9b61f00506021d1d0b6bfa8eb679ea 100644 (file)
--- a/isa/rv64mi/timer.S
+++ b/isa/rv64mi/timer.S
@@ -24,7 +24,7 @@ RVTEST_CODE_BEGIN
   csrw mtimecmp, a0
   li a0, MIP_MTIP
   csrs mie, a0
-  csrs mstatus, MSTATUS_IE
+  csrs mstatus, MSTATUS_MIE
 
   # advance an LFSR until the timer has fired enough times
   li s0, 1023
@@ -39,9 +39,14 @@ RVTEST_CODE_BEGIN
   add s4, s4, 1
   bltu s8, s9, 1b
 
-  # make sure the LFSR was computed correctly
+  # compute iteration count % 1023 without using REMU
   li s1, 1023
-  remu s4, s4, s1
+  bltu s4, s1, 2f
+1:sub s4, s4, s1
+  bgeu s4, s1, 1b
+2:
+
+  # make sure the LFSR was computed correctly
   la s1, lfsr
   sll s4, s4, 2
   add s1, s1, s4
@@ -59,7 +64,7 @@ mtvec_handler:
   bgez t0, fail
 
   sll t0, t0, 1
-  addi t0, t0, -2*IRQ_TIMER
+  addi t0, t0, -2*IRQ_M_TIMER
   bnez t0, fail
 
   csrr t0, mtime