Avoid deprecated "b" pseudo-op; use "j" instead

[riscv-tests.git] / isa / rv64si / ipi.S

diff --git a/isa/rv64si/ipi.S b/isa/rv64si/ipi.S
index 95a108a8f3922f15ceeb9a929642d92be753baba..753a182e4007473520a42f5772ee7dec1ba66abf 100644 (file)
--- a/isa/rv64si/ipi.S
+++ b/isa/rv64si/ipi.S
@@ -15,10 +15,8 @@ RVTEST_CODE_BEGIN
   la a0, handler
   csrw evec, a0
   csrw clear_ipi, x0
-  csrr a0, status
-  li a1, SR_EI | (1 << (IRQ_IPI + SR_IM_SHIFT))
-  or a0, a0, a1
-  csrw status, a0
+  li a0, SR_EI | (1 << (IRQ_IPI + SR_IM_SHIFT))
+  csrs status, a0
 
   # wait for all cores to boot
   la a0, coreid
@@ -34,7 +32,7 @@ RVTEST_CODE_BEGIN
   add a0, a0, 1
   rem a0, a0, a3
   csrw send_ipi, a0
-  1: b 1b
+  1: j 1b
 
   handler:
   csrr a0, hartid
@@ -46,7 +44,7 @@ RVTEST_CODE_BEGIN
   2: add a0, a0, 1
   rem a0, a0, a3
   csrw send_ipi, a0
-  1: b 1b
+  1: j 1b
 
 RVTEST_CODE_END