Make ENTROPY deterministic

[riscv-tests.git] / isa / rv64si / ma_fetch.S

diff --git a/isa/rv64si/ma_fetch.S b/isa/rv64si/ma_fetch.S
index ae8377de98d0a51b7c4460e180960841e2bc118f..7766c696ce6c195c2384c1ffef0c60aaca8b6f13 100644 (file)
--- a/isa/rv64si/ma_fetch.S
+++ b/isa/rv64si/ma_fetch.S
@@ -13,17 +13,31 @@
 RVTEST_RV64S
 RVTEST_CODE_BEGIN
 
-  la t0, stvec
-  csrw stvec, t0
+#ifdef __MACHINE_MODE
+  #define sscratch mscratch
+  #define sstatus mstatus
+  #define scause mcause
+  #define sepc mepc
+  #define sret mret
+  #define stvec_handler mtvec_handler
+#endif
+
+  .option norvc
 
-#ifndef __rvc
+  # Without RVC, the jalr should trap, and the handler will skip ahead.
+  # With RVC, the jalr should not trap, and "j fail" should get skipped.
   li TESTNUM, 2
   li t1, 0
   la t0, 1f
   jalr t1, t0, 2
+1:
+  .option rvc
+  c.j 1f
+  c.j 2f
+  .option norvc
 1:
   j fail
-#endif
+2:
 
   // This test should pass, since JALR ignores the target LSB
   li TESTNUM, 3
@@ -34,20 +48,25 @@ RVTEST_CODE_BEGIN
   j fail
 1:
 
-#ifndef __rvc
   li TESTNUM, 4
   li t1, 0
-  la t0, 3f
-  jr t0, 3
-3:
+  la t0, 1f
+  jalr t1, t0, 3
+1:
+  .option rvc
+  c.j 1f
+  c.j 2f
+  .option norvc
+1:
   j fail
-#endif
+2:
 
   j pass
 
   TEST_PASSFAIL
 
-stvec:
+  .align 2
+stvec_handler:
   # tests 2 and 4 should trap
   li a0, 2
   beq TESTNUM, a0, 1f
@@ -69,7 +88,7 @@ stvec:
   addi t0, t0, -4
   bne t0, a1, fail
 
-  addi a1, a1, 8
+  addi a1, a1, 12
   csrw sepc, a1
   sret