Add missing RV32 slt[i]u tests

[riscv-tests.git] / isa / rv64uf / fsgnj.S

diff --git a/isa/rv64uf/fsgnj.S b/isa/rv64uf/fsgnj.S
index 1c82db49996aabe7ecaa90e6bd2e18692048497c..6d4bdb4d590071e7ce474282f4703c31a19e6674 100644 (file)
--- a/isa/rv64uf/fsgnj.S
+++ b/isa/rv64uf/fsgnj.S
@@ -1,8 +1,10 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # fsgnj.S
 #-----------------------------------------------------------------------------
 #
-# Test fsgn{j|jn|x}.{s|d} instructions.
+# Test fsgn{j|jn|x}.s instructions.
 #
 
 #include "riscv_test.h"
@@ -30,21 +32,6 @@ RVTEST_CODE_BEGIN
   TEST_FP_OP2_S(24, fsgnjx.s, 0,  8.3, -8.3, -3.0 );
   TEST_FP_OP2_S(25, fsgnjx.s, 0, -9.3, -9.3,  4.0 );
 
-  TEST_FP_OP2_D(32,  fsgnj.d, 0, -6.3,  6.3, -1.0 );
-  TEST_FP_OP2_D(33,  fsgnj.d, 0,  7.3,  7.3,  2.0 );
-  TEST_FP_OP2_D(34,  fsgnj.d, 0, -8.3, -8.3, -3.0 );
-  TEST_FP_OP2_D(35,  fsgnj.d, 0,  9.3, -9.3,  4.0 );
-
-  TEST_FP_OP2_D(42, fsgnjn.d, 0,  6.3,  6.3, -1.0 );
-  TEST_FP_OP2_D(43, fsgnjn.d, 0, -7.3,  7.3,  2.0 );
-  TEST_FP_OP2_D(44, fsgnjn.d, 0,  8.3, -8.3, -3.0 );
-  TEST_FP_OP2_D(45, fsgnjn.d, 0, -9.3, -9.3,  4.0 );
-
-  TEST_FP_OP2_D(52, fsgnjx.d, 0, -6.3,  6.3, -1.0 );
-  TEST_FP_OP2_D(53, fsgnjx.d, 0,  7.3,  7.3,  2.0 );
-  TEST_FP_OP2_D(54, fsgnjx.d, 0,  8.3, -8.3, -3.0 );
-  TEST_FP_OP2_D(55, fsgnjx.d, 0, -9.3, -9.3,  4.0 );
-
   TEST_PASSFAIL
 
 RVTEST_CODE_END