ERET -> xRET; new memory map

[riscv-tests.git] / isa / rv64uf / recoding.S

diff --git a/isa/rv64uf/recoding.S b/isa/rv64uf/recoding.S
index 6397143feff169c605102cc16cec4f29e38f935f..2ab17e268dcab48f26cea29f60abb13cf4bd024d 100644 (file)
--- a/isa/rv64uf/recoding.S
+++ b/isa/rv64uf/recoding.S
@@ -24,6 +24,15 @@ RVTEST_CODE_BEGIN
   TEST_CASE( 3, a0, 1, fle.s a0, f0, f1)
   TEST_CASE( 4, a0, 0, flt.s a0, f0, f1)
 
+  # Likewise, but for zeroes.
+  fcvt.d.w f0, x0
+  li a0, 1
+  fcvt.d.w f1, a0
+  fmul.d f1, f1, f0
+  TEST_CASE(5, a0, 1, feq.d a0, f0, f1)
+  TEST_CASE(6, a0, 1, fle.d a0, f0, f1)
+  TEST_CASE(7, a0, 0, flt.d a0, f0, f1)
+
   # When converting small doubles to single-precision subnormals,
   # ensure that the extra precision is discarded.
   flw f0, big, a0
@@ -34,6 +43,14 @@ RVTEST_CODE_BEGIN
   lw a1, small
   TEST_CASE(10, a0, 0, sub a0, a0, a1)
 
+  # Make sure FSD+FLD correctly saves and restores a single-precision value.
+  flw f0, three, a0
+  fadd.s f1, f0, f0
+  fadd.s f0, f0, f0
+  fsd f0, tiny, a0
+  fld f0, tiny, a0
+  TEST_CASE(20, a0, 1, feq.s a0, f0, f1)
+
   TEST_PASSFAIL
 
 RVTEST_CODE_END