+# See LICENSE for license details.
+
#*****************************************************************************
# jal.S
#-----------------------------------------------------------------------------
#-------------------------------------------------------------
test_2:
- li x28, 2
+ li TESTNUM, 2
li ra, 0
+ jal x4, target_2
linkaddr_2:
- jal target_2
nop
nop
target_2:
la x2, linkaddr_2
- addi x2, x2, 4
- bne x2, ra, fail
+ bne x2, x4, fail
#-------------------------------------------------------------
# Test delay slot instructions not executed nor bypassed
#-------------------------------------------------------------
- TEST_CASE( 3, x2, 3, \
- li x2, 1; \
- jal 1f; \
- addi x2, x2, 1; \
- addi x2, x2, 1; \
- addi x2, x2, 1; \
- addi x2, x2, 1; \
-1: addi x2, x2, 1; \
- addi x2, x2, 1; \
+ TEST_CASE( 3, ra, 3, \
+ li ra, 1; \
+ jal x0, 1f; \
+ addi ra, ra, 1; \
+ addi ra, ra, 1; \
+ addi ra, ra, 1; \
+ addi ra, ra, 1; \
+1: addi ra, ra, 1; \
+ addi ra, ra, 1; \
)
TEST_PASSFAIL