Add vfmsv instruction test, change vsetprec to vsetucfg

[riscv-tests.git] / isa / rv64uv / Makefrag

diff --git a/isa/rv64uv/Makefrag b/isa/rv64uv/Makefrag
index b251942a1807bab14ad7b69aca9b9e4c8f5e6732..affbdaf24583fa27aadcfcd5eb51e9158a1dfb58 100644 (file)
--- a/isa/rv64uv/Makefrag
+++ b/isa/rv64uv/Makefrag
@@ -6,6 +6,7 @@ rv64uv_sc_tests = \
        wakeup fence \
        vsetcfgi vsetcfg vsetvl \
        vmvv vmsv \
+       vfmvv vfmsv \
        utidx \
        lb lbu lh lhu lw lwu ld \
        sb sh sw sd \