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Merge branch 'master' of github.com:ucb-bar/riscv-tests
[riscv-tests.git]
/
isa
/
rv64uv
/
vvmul_d.S
diff --git
a/isa/rv64uv/vvmul_d.S
b/isa/rv64uv/vvmul_d.S
index 9748fa41dd1d44f6cf82b340faea0cb8e060a7b9..335fe3b97c29e22ae1b8bb5e8b2bd22bc63863d5 100644
(file)
--- a/
isa/rv64uv/vvmul_d.S
+++ b/
isa/rv64uv/vvmul_d.S
@@
-11,8
+11,9
@@
RVTEST_RV64U
RVTEST_CODE_BEGIN
+ vsetcfg 32,0
li a3,4
- v
vcfgivl a3,a3,32,0
+ v
setvl a3,a3
la a3,src1
la a4,src2
@@
-22,7
+23,7
@@
RVTEST_CODE_BEGIN
vf %lo(vtcode)(a0)
la a5,dest
vsd vx2,a5
- fence
.v.l
+ fence
ld a1,0(a5)
li a2,4
li x28,2