Add LICENSE

[riscv-tests.git] / isa / rv64uv / vvmul_d.S

diff --git a/isa/rv64uv/vvmul_d.S b/isa/rv64uv/vvmul_d.S
index 9748fa41dd1d44f6cf82b340faea0cb8e060a7b9..433b80e43fc2c87eadaf71c4b7a94a6b63bf62de 100644 (file)
--- a/isa/rv64uv/vvmul_d.S
+++ b/isa/rv64uv/vvmul_d.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # vvmul_d.S
 #-----------------------------------------------------------------------------
@@ -8,11 +10,12 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
+  vsetcfg 32,0
   li a3,4
-  vvcfgivl a3,a3,32,0
+  vsetvl a3,a3
 
   la a3,src1
   la a4,src2
@@ -22,22 +25,22 @@ RVTEST_CODE_BEGIN
   vf %lo(vtcode)(a0)
   la a5,dest
   vsd vx2,a5
-  fence.v.l
+  fence
   ld a1,0(a5)
   li a2,4
-  li x28,2
+  li TESTNUM,2
   bne a1,a2,fail
   ld a1,8(a5)
   li a2,6
-  li x28,3
+  li TESTNUM,3
   bne a1,a2,fail
   ld a1,16(a5)
   li a2,6
-  li x28,4
+  li TESTNUM,4
   bne a1,a2,fail
   ld a1,24(a5)
   li a2,4
-  li x28,5
+  li TESTNUM,5
   bne a1,a2,fail
   j pass