Reference TESTNUM instead of x28 directly

[riscv-tests.git] / isa / rv64uv / wakeup.S

diff --git a/isa/rv64uv/wakeup.S b/isa/rv64uv/wakeup.S
index 62cc6c8ddfd60fd7fee78466d76356fdbbf04c6a..958f6688f6543afb5aeeaeb33fd41a7a6f2fcfb1 100644 (file)
--- a/isa/rv64uv/wakeup.S
+++ b/isa/rv64uv/wakeup.S
@@ -8,14 +8,13 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   # make sure these don't choke at the beginning
-  fence.v.l
-  fence.v.l
-  fence.v.g
-  fence.v.g
+  fence
+  fence rw,io
+  fence io,rw
 
   # this shouldn't go through since app vl is zero
   la a3,src1
@@ -26,42 +25,42 @@ RVTEST_CODE_BEGIN
   vf %lo(vtcode1)(a0)
   la a5,dest
   vsd vx2,a5
-  fence.v.l
+  fence
 
   ld a1,0(a5)
   li a2,0xdeadbeefcafebabe
-  li x28,2
+  li TESTNUM,2
   bne a1,a2,fail
   ld a1,8(a5)
-  li x28,3
+  li TESTNUM,3
   bne a1,a2,fail
   ld a1,16(a5)
-  li x28,4
+  li TESTNUM,4
   bne a1,a2,fail
   ld a1,24(a5)
-  li x28,5
+  li TESTNUM,5
   bne a1,a2,fail
 
   # check default hw vector length, which is 32
   li a3, 32
   vsetvl a3, a3
   li a0, 32
-  li x28, 6
+  li TESTNUM, 6
   bne a3, a0, fail
 
   li a3, 33
   vsetvl a3, a3
   li a0, 32
-  li x28, 7
+  li TESTNUM, 7
   bne a3, a0, fail
 
   li a3, 31
   vsetvl a3, a3
   li a0, 31
-  li x28, 8
+  li TESTNUM, 8
   bne a3, a0, fail
 
-  # now do some vector stuff without vvcfgivl
+  # now do some vector stuff without vsetcfg
   vsetvl x0, x0
 
   li a3, 4
@@ -74,20 +73,20 @@ RVTEST_CODE_BEGIN
   vf %lo(vtcode1)(a0)
   la a5,dest
   vsd vx2,a5
-  fence.v.l
+  fence
 
   ld a1,0(a5)
   li a2,5
-  li x28,9
+  li TESTNUM,9
   bne a1,a2,fail
   ld a1,8(a5)
-  li x28,10
+  li TESTNUM,10
   bne a1,a2,fail
   ld a1,16(a5)
-  li x28,11
+  li TESTNUM,11
   bne a1,a2,fail
   ld a1,24(a5)
-  li x28,12
+  li TESTNUM,12
   bne a1,a2,fail
 
   # initialize dest memory
@@ -109,20 +108,20 @@ RVTEST_CODE_BEGIN
   vf %lo(vtcode1)(a0)
   la a5,dest
   vsd vx2,a5
-  fence.v.l
+  fence
 
   ld a1,0(a5)
   li a2,0xdeadbeefcafebabe
-  li x28,13
+  li TESTNUM,13
   bne a1,a2,fail
   ld a1,8(a5)
-  li x28,14
+  li TESTNUM,14
   bne a1,a2,fail
   ld a1,16(a5)
-  li x28,15
+  li TESTNUM,15
   bne a1,a2,fail
   ld a1,24(a5)
-  li x28,16
+  li TESTNUM,16
   bne a1,a2,fail
 
   j pass