Set cmderr when data is accessed while busy.

[riscv-isa-sim.git] / riscv / debug_module.cc

diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index f672a892bcc0a38ef033a446d69e94eecf48e137..af719746a286495a3caf946e9a4161653223f056 100644 (file)
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -111,7 +111,7 @@ void debug_module_t::add_device(bus_t *bus) {
 
 bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
 {
-  D(fprintf(stderr, "load 0x%lx bytes at 0x%lx\n",
+  D(fprintf(stderr, "debug_module_t load 0x%lx bytes at 0x%lx\n",
         len, addr));
   addr = DEBUG_START + addr;
 
@@ -140,6 +140,12 @@ bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
 
   if (addr >= DEBUG_ROM_CODE &&
       addr < DEBUG_ROM_CODE + DEBUG_ROM_CODE_SIZE) {
+
+    if (read32(debug_rom_code, 0) == dret()) {
+      abstractcs.busy = false;
+      halted[dmcontrol.hartsel] = false;
+    }
+
     memcpy(bytes, debug_rom_code + addr - DEBUG_ROM_CODE, len);
     return true;
   }
@@ -212,7 +218,27 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value)
   uint32_t result = 0;
   D(fprintf(stderr, "dmi_read(0x%x) -> ", address));
   if (address >= DMI_DATA0 && address < DMI_DATA0 + abstractcs.datacount) {
-    result = dmdata.read32(4 * (address - DMI_DATA0));
+    unsigned i = address - DMI_DATA0;
+    result = dmdata.read32(4 * i);
+
+    if (abstractcs.busy && abstractcs.cmderr == abstractcs.CMDERR_NONE) {
+      abstractcs.cmderr = abstractcs.CMDERR_BUSY;
+    }
+
+    bool autoexec = false;
+    switch (i) {
+      case 0:   autoexec = abstractcs.autoexec0; break;
+      case 1:   autoexec = abstractcs.autoexec1; break;
+      case 2:   autoexec = abstractcs.autoexec2; break;
+      case 3:   autoexec = abstractcs.autoexec3; break;
+      case 4:   autoexec = abstractcs.autoexec4; break;
+      case 5:   autoexec = abstractcs.autoexec5; break;
+      case 6:   autoexec = abstractcs.autoexec6; break;
+      case 7:   autoexec = abstractcs.autoexec7; break;
+    }
+    if (autoexec) {
+      perform_abstract_command();
+    }
   } else if (address >= DMI_IBUF0 && address < DMI_IBUF0 + progsize) {
     result = read32(program_buffer, address - DMI_IBUF0);
   } else {
@@ -270,7 +296,7 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value)
   return true;
 }
 
-bool debug_module_t::perform_abstract_command(uint32_t command)
+bool debug_module_t::perform_abstract_command()
 {
   if (abstractcs.cmderr != abstractcs.CMDERR_NONE)
     return true;
@@ -351,8 +377,29 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
 {
   D(fprintf(stderr, "dmi_write(0x%x, 0x%x)\n", address, value));
   if (address >= DMI_DATA0 && address < DMI_DATA0 + abstractcs.datacount) {
-    dmdata.write32(4 * (address - DMI_DATA0), value);
+    unsigned i = address - DMI_DATA0;
+    dmdata.write32(4 * i, value);
+
+    if (abstractcs.busy && abstractcs.cmderr == abstractcs.CMDERR_NONE) {
+      abstractcs.cmderr = abstractcs.CMDERR_BUSY;
+    }
+
+    bool autoexec = false;
+    switch (i) {
+      case 0:   autoexec = abstractcs.autoexec0; break;
+      case 1:   autoexec = abstractcs.autoexec1; break;
+      case 2:   autoexec = abstractcs.autoexec2; break;
+      case 3:   autoexec = abstractcs.autoexec3; break;
+      case 4:   autoexec = abstractcs.autoexec4; break;
+      case 5:   autoexec = abstractcs.autoexec5; break;
+      case 6:   autoexec = abstractcs.autoexec6; break;
+      case 7:   autoexec = abstractcs.autoexec7; break;
+    }
+    if (autoexec) {
+      perform_abstract_command();
+    }
     return true;
+
   } else if (address >= DMI_IBUF0 && address < DMI_IBUF0 + progsize) {
     write32(program_buffer, address - DMI_IBUF0, value);
     return true;
@@ -363,6 +410,7 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
           dmcontrol.dmactive = get_field(value, DMI_DMCONTROL_DMACTIVE);
           if (dmcontrol.dmactive) {
             dmcontrol.haltreq = get_field(value, DMI_DMCONTROL_HALTREQ);
+            dmcontrol.resumereq = get_field(value, DMI_DMCONTROL_RESUMEREQ);
             dmcontrol.reset = get_field(value, DMI_DMCONTROL_RESET);
             dmcontrol.hartsel = get_field(value, DMI_DMCONTROL_HARTSEL);
           } else {
@@ -371,12 +419,19 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
           processor_t *proc = current_proc();
           if (proc) {
             proc->halt_request = dmcontrol.haltreq;
+            if (dmcontrol.resumereq) {
+              write32(debug_rom_code, 0, dret());
+              write32(debug_rom_entry, dmcontrol.hartsel,
+                  jal(ZERO, DEBUG_ROM_CODE - (DEBUG_ROM_ENTRY + 4 * dmcontrol.hartsel)));
+              abstractcs.busy = true;
+            }
           }
         }
         return true;
 
       case DMI_COMMAND:
-        return perform_abstract_command(value);
+        command = value;
+        return perform_abstract_command();
 
       case DMI_ABSTRACTCS:
         abstractcs.autoexec7 = get_field(value, DMI_ABSTRACTCS_AUTOEXEC7);