Move cleardebint, per spec.

[riscv-isa-sim.git] / riscv / decode.h

diff --git a/riscv/decode.h b/riscv/decode.h
index b922e0228673594d115fee802b62fbbd88260cef..4480312bab8d37a6cd30046a1d389c6a1cb8d425 100644 (file)
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -225,9 +225,17 @@ private:
     throw trap_illegal_instruction(); \
   (which); })
 
-/* Debug CSRs. These should probably be in encoding.h, but that file is
- * automatically generated. */
-/* TODO */
-#include "/media/sf_tnewsome/Synced/SiFive/debug-spec/core_registers.tex.h"
+#define DEBUG_START             0x100
+#define DEBUG_ROM_START         0x800
+#define DEBUG_ROM_RESUME        (DEBUG_ROM_START + 4)
+#define DEBUG_ROM_EXCEPTION     (DEBUG_ROM_START + 8)
+#define DEBUG_ROM_END           (DEBUG_ROM_START + debug_rom_raw_len)
+#define DEBUG_RAM_START         0x400
+#define DEBUG_RAM_SIZE          64
+#define DEBUG_RAM_END           (DEBUG_RAM_START + DEBUG_RAM_SIZE)
+#define DEBUG_END               0xfff
+#define DEBUG_CLEARDEBINT       0x104
+#define DEBUG_SETHALTNOT        0x100
+#define DEBUG_SIZE              (DEBUG_END - DEBUG_START + 1)
 
 #endif