Eliminate infinite loop in debug mode

[riscv-isa-sim.git] / riscv / htif.cc

diff --git a/riscv/htif.cc b/riscv/htif.cc
index 0512b6f3be3072d4bc9e6166fb5f8e9c0049dccc..fc903751a0cb86eac075d78b4d74e871a0dd3ea3 100644 (file)
--- a/riscv/htif.cc
+++ b/riscv/htif.cc
@@ -106,8 +106,5 @@ bool htif_isasim_t::done()
 {
   if (reset)
     return false;
-  for (size_t i = 0; i < sim->num_cores(); i++)
-    if (sim->procs[i]->running())
-      return false;
-  return true;
+  return !sim->running();
 }