sfence.vm -> sfence.vma

[riscv-isa-sim.git] / riscv / insns / addw.h

diff --git a/riscv/insns/addw.h b/riscv/insns/addw.h
index 4e2ed561677827fb72ffe7753d2d16823b88f017..706dc9c8f98b55be4bcc43d4bb7693d13bf738f5 100644 (file)
--- a/riscv/insns/addw.h
+++ b/riscv/insns/addw.h
@@ -1,2 +1,2 @@
-require_xpr64;
-RD = sext32(RS1 + RS2);
+require_rv64;
+WRITE_RD(sext32(RS1 + RS2));