Make IRQ_COP read-only/undelegable unless coprocessor is present
[riscv-isa-sim.git] / riscv / insns / amoadd_d.h
index c6bacaf57823908d3e13c0715ff78f6105a8e4a2..6090fbc530d078cee63ea31bb78ecf70a1c6a534 100644 (file)
@@ -1,4 +1,3 @@
+require_extension('A');
 require_rv64;
-reg_t v = MMU.load_uint64(RS1);
-MMU.store_uint64(RS1, RS2 + v);
-WRITE_RD(v);
+WRITE_RD(MMU.amo_uint64(RS1, [&](uint64_t lhs) { return lhs + RS2; }));