revamp hwacha; now runs in physical mode
[riscv-isa-sim.git] / riscv / insns / amoor_d.h
index 76a45086a5498c4c2783d9c2bead0b172880fa85..500803f6876d590bbb7a2150a9e6f681464f9d96 100644 (file)
@@ -1,4 +1,4 @@
 require_xpr64;
-reg_t v = mmu.load_uint64(RS1);
-mmu.store_uint64(RS1, RS2 | v);
-RD = v;
+reg_t v = MMU.load_uint64(RS1);
+MMU.store_uint64(RS1, RS2 | v);
+WRITE_RD(v);