Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / amoswap_d.h

diff --git a/riscv/insns/amoswap_d.h b/riscv/insns/amoswap_d.h
index 3423b91de2dab5464aad40dc6c0dbc6b17df7253..f03d2aabba95716c3d2bbde10d1a39dc3741e9ef 100644 (file)
--- a/riscv/insns/amoswap_d.h
+++ b/riscv/insns/amoswap_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2);
-RD = v;
+WRITE_RD(v);