Encode VM type in sptbr, not mstatus

[riscv-isa-sim.git] / riscv / insns / amoswap_w.h

diff --git a/riscv/insns/amoswap_w.h b/riscv/insns/amoswap_w.h
index b888235c494173a3e92a552e2f2ef3477e339568..0f78369c76eeccec56f4c7e3d48d3687245b2839 100644 (file)
--- a/riscv/insns/amoswap_w.h
+++ b/riscv/insns/amoswap_w.h
@@ -1,3 +1,2 @@
-reg_t v = MMU.load_int32(RS1);
-MMU.store_uint32(RS1, RS2);
-RD = v;
+require_extension('A');
+WRITE_RD(sext32(MMU.amo_uint32(RS1, [&](uint32_t lhs) { return RS2; })));