Move towards RVC v1.8

[riscv-isa-sim.git] / riscv / insns / c_fldsp.h

diff --git a/riscv/insns/c_fldsp.h b/riscv/insns/c_fldsp.h
new file mode 100644 (file)
index 0000000..8b1e19f
--- /dev/null
+++ b/riscv/insns/c_fldsp.h
@@ -0,0 +1,4 @@
+require_extension('C');
+require_extension('D');
+require_fp;
+WRITE_FRD(MMU.load_int64(RVC_SP + insn.rvc_ldsp_imm()));