temporary undoing of renaming

[riscv-isa-sim.git] / riscv / insns / c_fsw.h

diff --git a/riscv/insns/c_fsw.h b/riscv/insns/c_fsw.h
new file mode 100644 (file)
index 0000000..1d21629
--- /dev/null
+++ b/riscv/insns/c_fsw.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_fp;
+mmu.store_uint32(CRS1S+CIMM5*4, FCRS2S);