Update to new privileged ISA

[riscv-isa-sim.git] / riscv / insns / csrrw.h

diff --git a/riscv/insns/csrrw.h b/riscv/insns/csrrw.h
new file mode 100644 (file)
index 0000000..fbccb77
--- /dev/null
+++ b/riscv/insns/csrrw.h
@@ -0,0 +1,2 @@
+int csr = validate_csr(insn.i_imm(), true);
+WRITE_RD(p->set_pcr(csr, RS1));