sfence.vm -> sfence.vma

[riscv-isa-sim.git] / riscv / insns / div.h

diff --git a/riscv/insns/div.h b/riscv/insns/div.h
index 82a40666dcca5021cf67dc7f74c828b52e2e3089..9cbe8d6b321648b144834ef2514948c1b8f19bff 100644 (file)
--- a/riscv/insns/div.h
+++ b/riscv/insns/div.h
@@ -1,6 +1,9 @@
-if(RS2 == 0)
-  RD = UINT64_MAX;
-else if(sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)
-  RD = RS1;
+require_extension('M');
+sreg_t lhs = sext_xlen(RS1);
+sreg_t rhs = sext_xlen(RS2);
+if(rhs == 0)
+  WRITE_RD(UINT64_MAX);
+else if(lhs == INT64_MIN && rhs == -1)
+  WRITE_RD(lhs);
 else
-  RD = sext_xprlen(sext_xprlen(RS1) / sext_xprlen(RS2));
+  WRITE_RD(sext_xlen(lhs / rhs));