Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / eret.h

diff --git a/riscv/insns/eret.h b/riscv/insns/eret.h
index 37e85885ffd6186d0f277d6dcd1ecabb96b49a5c..d4517eea13a8ec612bbbc57576ab941336506ce9 100644 (file)
--- a/riscv/insns/eret.h
+++ b/riscv/insns/eret.h
@@ -1,5 +1,5 @@
 require_supervisor;
-if(sr & SR_ET)
-  throw trap_illegal_instruction;
-set_sr(((sr & SR_PS) ? sr : (sr & ~SR_S)) | SR_ET);
-npc = epc;
+p->set_pcr(PCR_SR, ((p->get_state()->sr & ~(SR_S | SR_EI)) |
+                ((p->get_state()->sr & SR_PS) ? SR_S : 0)) |
+                ((p->get_state()->sr & SR_PEI) ? SR_EI : 0));
+set_pc(p->get_state()->epc);