Update to new privileged spec

[riscv-isa-sim.git] / riscv / insns / fcvt_l_d.h

diff --git a/riscv/insns/fcvt_l_d.h b/riscv/insns/fcvt_l_d.h
index bf03b714b1883671458919bf7252edd6c88a0739..55dbe27d2b70e491585012098607e0a0d20cc82e 100644 (file)
--- a/riscv/insns/fcvt_l_d.h
+++ b/riscv/insns/fcvt_l_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_RD(f64_to_i64(FRS1, RM, true));