projects
/
riscv-isa-sim.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
| inline |
side by side
Use WRITE_RD/WRITE_FRD macros to write registers
[riscv-isa-sim.git]
/
riscv
/
insns
/
fcvt_l_d.h
diff --git
a/riscv/insns/fcvt_l_d.h
b/riscv/insns/fcvt_l_d.h
index 206ba4fc4c4eebf75a67f8677531c76322cba1c6..bf03b714b1883671458919bf7252edd6c88a0739 100644
(file)
--- a/
riscv/insns/fcvt_l_d.h
+++ b/
riscv/insns/fcvt_l_d.h
@@
-1,5
+1,5
@@
require_xpr64;
require_fp;
softfloat_roundingMode = RM;
-
RD = f64_to_i64(FRS1, RM, true
);
+
WRITE_RD(f64_to_i64(FRS1, RM, true)
);
set_fp_exceptions;