Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fcvt_s_d.h

diff --git a/riscv/insns/fcvt_s_d.h b/riscv/insns/fcvt_s_d.h
index e5289c4b0d1866f19744089b0d93b6ef9aef3c7a..28a1d6969df2092d300991f5e5bb6d6f42308ce8 100644 (file)
--- a/riscv/insns/fcvt_s_d.h
+++ b/riscv/insns/fcvt_s_d.h
@@ -1,4 +1,4 @@
 require_fp;
 softfloat_roundingMode = RM;
-FRD = f64_to_f32(FRS1);
+WRITE_FRD(f64_to_f32(FRS1));
 set_fp_exceptions;