Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / fcvt_s_lu.h

diff --git a/riscv/insns/fcvt_s_lu.h b/riscv/insns/fcvt_s_lu.h
index e9bf78e0324f8abc340bb33e234473ae60845588..70c676edf410ba60fdc3be0599a03077ea8f6d48 100644 (file)
--- a/riscv/insns/fcvt_s_lu.h
+++ b/riscv/insns/fcvt_s_lu.h
@@ -2,5 +2,5 @@ require_extension('F');
 require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(ui64_to_f32(RS1).v);
+WRITE_FRD(ui64_to_f32(RS1));
 set_fp_exceptions;