sim: define emulated CPU clock rate to be 1GHz

[riscv-isa-sim.git] / riscv / insns / fld.h

diff --git a/riscv/insns/fld.h b/riscv/insns/fld.h
index 2704a4d25ad7ebee82b29aaf4f5f49f160732e06..0b50b8a5ac147dd0112f0bb9ca05c5300a532f03 100644 (file)
--- a/riscv/insns/fld.h
+++ b/riscv/insns/fld.h
@@ -1,2 +1,3 @@
+require_extension('D');
 require_fp;
-FRD = MMU.load_int64(ITYPE_EADDR);
+WRITE_FRD(MMU.load_int64(RS1 + insn.i_imm()));