Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / fmadd_d.h

diff --git a/riscv/insns/fmadd_d.h b/riscv/insns/fmadd_d.h
index 98f1cbc25cc5b2a99b438bb8b4d1362415b72a47..ab22bebbf609948ad7f862e9391b50d86b026684 100644 (file)
--- a/riscv/insns/fmadd_d.h
+++ b/riscv/insns/fmadd_d.h
@@ -1,5 +1,5 @@
 require_extension('D');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f64_mulAdd(f64(FRS1), f64(FRS2), f64(FRS3)).v);
+WRITE_FRD(f64_mulAdd(f64(FRS1), f64(FRS2), f64(FRS3)));
 set_fp_exceptions;